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  1. Oct 21, 2011
    • Linus Walleij's avatar
      net: dc2114x: check for apropriate command · df6a36fb
      Linus Walleij authored
      
      The code had two paths depending on whether the card was to be
      accessed from plain memory or the IO region. However the error
      path checks whether IO region was obtained - twice. Fix up the
      error path according to the probable intention.
      
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      df6a36fb
    • Macpaul Lin's avatar
      ftgmac100: reset fix when supports wake on lan · 55b438a9
      Macpaul Lin authored
      
      This patch move the reset function from initialization to
      driver register procedure.
      
      Some embedded system supports wake on lan nowadays. On this kind of system,
      the ftgmac100 will be still supplied power after the system has been
      shut-down by Linux. Hence the register used by linux won't be clear
      when the system has been powered-off.
      
      The origin ftgmac100 driver in u-boot will only register
      driver and functions to network stack and won't reset the ftgmac100
      hardware if the network won't be used during boot-up.
      This will lead ftgmac100 continue receiving packets and then might corrupt
      linux kernel when booting up.
      
      So we reorder the hardware reset function earlier to force the hardware
      to be reset whether it will be used or not.
      
      Signed-off-by: default avatarMacpaul Lin <macpaul@andestech.com>
      55b438a9
  2. Oct 20, 2011
  3. Oct 18, 2011
  4. Oct 17, 2011
  5. Oct 16, 2011
  6. Oct 15, 2011
  7. Oct 14, 2011
  8. Oct 13, 2011
  9. Oct 12, 2011
    • Xiangfu Liu's avatar
      MIPS: Jz4740: Add NAND driver · 3a6591a8
      Xiangfu Liu authored
      
      Jz4740 NAND flash controller can support:
      * MLC NAND as well as SLC NAND
      * all 8-bit/16-bit NAND flash devices
      * HAMMING and RS hardware ECC
      * automatic boot up from NAND flash devices
      
      nand_ecclayout is set up for 2GiB NAND chip mounted in Qi LB60.
      We'll bring up boot-from-NAND support in nand_spl/ in the future.
      
      Signed-off-by: default avatarXiangfu Liu <xiangfu@openmobilefree.net>
      Acked-by: default avatarDaniel <zpxu@ingenic.cn>
      Signed-off-by: default avatarShinya Kuribayashi <skuribay@pobox.com>
      3a6591a8
    • Holger Brunck's avatar
      UBI: init eba tables before wl when attaching a device · d6389465
      Holger Brunck authored
      
      This fixes that u-boot gets stuck when a bitflip was detected
      during "ubi part <ubi_device>". If a bitflip was detected UBI tries
      to copy the PEB to a different place. This needs that the eba table
      are initialized, but this was done after the wear levelling worker
      detects the bitflip. So changes the initialisation of these two
      tasks in u-boot.
      
      This is a u-boot specific patch and not needed in the linux layer,
      because due to commit 1b1f9a9d
      UBI: Ensure that "background thread" operations are really executed
      we schedule these tasks in place and not as in linux after the inital
      task which schedule this new task is finished.
      
      Signed-off-by: default avatarHolger Brunck <holger.brunck@keymile.com>
      cc: Stefan Roese <sr@denx.de>
      Signed-off-by: default avatarStefan Roese <sr@denx.de>
      d6389465
  10. Oct 10, 2011
    • Laurence Withers's avatar
      NAND: davinci: choose correct 1-bit h/w ECC reg · 60161943
      Laurence Withers authored
      
      In nand_davinci_readecc(), select the correct NANDF<n>ECC register based
      on CONFIG_SYS_NAND_CS rather than hardcoding the choice of NANDF1ECC.
      This allows 1-bit hardware ECC to work with chip select other than CS2.
      
      Note this now matches the usage in nand_davinci_enable_hwecc(), which
      already had the correct handling, and allows refactoring to a single
      function encapsulating the register read.
      
      Without this fix, writing NAND pages to a chip not wired to CS2 would
      result in in the ECC calculation always returning FFFFFF for each
      512-byte segment, and reading back a correctly written page (one with
      ECC intact) would always fail. With this fix, the ECC is written and
      verified correctly.
      
      Signed-off-by: default avatarLaurence Withers <lwithers@guralp.com>
      Signed-off-by: default avatarScott Wood <scottwood@freescale.com>
      60161943
  11. Oct 09, 2011
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