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  1. Nov 27, 2010
    • Scott Wood's avatar
      83xx: Fix NAND_SPL link address · f1c574d4
      Scott Wood authored
      
      Apply the same fix for 83xx as was done for 85xx in commit
      96196a1f.
      
      Without this, NAND SPLs are built with the text base intended for the main
      image, resulting in a broken, very large u-boot-nand.bin.
      
      The block of defines for NAND boot is moved closer to where
      CONFIG_SYS_TEXT_BASE is defined.  We can't directly use
      CONFIG_SYS_NAND_U_BOOT_DST in the definition of CONFIG_SYS_TEXT_BASE because
      autoconf.mk will include the literal text "CONFIG_SYS_NAND_U_BOOT_DST",
      but at least keep them close and point out that they're supposed to be
      the same.
      
      Signed-off-by: default avatarScott Wood <scottwood@freescale.com>
      f1c574d4
  2. Nov 17, 2010
  3. Nov 12, 2010
  4. Oct 29, 2010
    • Wolfgang Denk's avatar
      Drop support for CONFIG_SYS_ARM_WITHOUT_RELOC · a9aa3926
      Wolfgang Denk authored
      
      When this define was introduced, the idea was to provide a soft
      migration path for ARM boards to get adapted to the new relocation
      support.  However, other recent changes led to a different
      implementation (ELF relocation), where this no longer works.  By now
      CONFIG_SYS_ARM_WITHOUT_RELOC does not only not help any more, but it
      actually hurts because it obfuscates the actual code by sprinkling it
      with lots of dead and non-working debris.
      
      So let's make a clean cut and drop CONFIG_SYS_ARM_WITHOUT_RELOC.
      
      Signed-off-by: default avatarWolfgang Denk <wd@denx.de>
      Tested-by: default avatarHeiko Schocher <hs@denx.de>
      Tested-by: default avatarReinhard Meyer <u-boot@emk-elektronik.de>
      a9aa3926
  5. Oct 18, 2010
  6. Oct 13, 2010
  7. Sep 23, 2010
  8. Sep 19, 2010
    • Heiko Schocher's avatar
      ARM: implement relocation for ARM926 · ab86f72c
      Heiko Schocher authored
      
      Change the implementation for arm926 to relocate the code to
      an arbitrary address in RAM.
      
      Adapt the TX25 (i.MX25), magnesium board to test the changes.
      
      On the tx25 board TEXT_BASE is set to the final relocation
      address to prevent one more copying of u-boot code
      when relocating. More info see:
      doc/README.arm-relocation
      
      da850 board:
      Tested-by: default avatarBen Gardiner <bengardiner@nanometrics.ca>
      
      Portions of this work were supported by funding from
      the CE Linux Forum.
      
      Signed-off-by: default avatarHeiko Schocher <hs@denx.de>
      Cc: Ben Gardiner <bengardiner@nanometrics.ca>
      ab86f72c
    • Heiko Schocher's avatar
      ARM: add relocation support · f1d2b313
      Heiko Schocher authored
      
      !! This breaks support for all arm boards !!
      
      To compile in old style, you must define
      CONFIG_SYS_ARM_WITHOUT_RELOC or you can compile
      with "CONFIG_SYS_ARM_WITHOUT_RELOC=1 ./MAKEALL board"
      
      !! This define will be removed soon, so convert your
      board to use relocation support
      
      Portions of this work were supported by funding from
      the CE Linux Forum.
      
      Signed-off-by: default avatarHeiko Schocher <hs@denx.de>
      
      Fix boot from NAND for non-ARM systems
      Signed-off-by: default avatarWolfgang Denk <wd@denx.de>
      f1d2b313
    • Heiko Schocher's avatar
      nand_boot_fsl_nfc.c: make "nfc" a "static const" pointer · 4fff329d
      Heiko Schocher authored
      
      With -fPIC enabled, this variable needs an entry in the GOT, which
      causes the image size to exceed 2 KiB which is the maximum allowed for
      some systems. Making it a "static const" avoids the GOT entry and thus
      reduces the image size to < 2 KiB.
      
      Portions of this work were supported by funding from
      the CE Linux Forum.
      
      Signed-off-by: default avatarHeiko Schocher <hs@denx.de>
      Acked-by: default avatarScott Wood <scottwood@freescale.com>
      4fff329d
  9. Jul 16, 2010
    • Becky Bruce's avatar
      83xx/85xx/86xx: LBC register cleanup · f51cdaf1
      Becky Bruce authored
      
      Currently, 83xx, 86xx, and 85xx have a lot of duplicated code
      dedicated to defining and manipulating the LBC registers.  Merge
      this into a single spot.
      
      To do this, we have to decide on a common name for the data structure
      that holds the lbc registers - it will now be known as fsl_lbc_t, and we
      adopt a common name for the immap layouts that include the lbc - this was
      previously known as either im_lbc or lbus; use the former.
      
      In addition, create accessors for the BR/OR regs that use in/out_be32
      and use those instead of the mismash of access methods currently in play.
      
      I have done a successful ppc build all and tested a board or two from
      each processor family.
      
      Signed-off-by: default avatarBecky Bruce <beckyb@kernel.crashing.org>
      Acked-by: default avatarKim Phillips <kim.phillips@freescale.com>
      Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
      f51cdaf1
  10. Apr 21, 2010
  11. Apr 13, 2010
  12. Mar 07, 2010
  13. Mar 02, 2010
    • Kim Phillips's avatar
      mpc83xx: fix out-of-tree mpc8315 nand build · fe389da6
      Kim Phillips authored
      
      commit 2e95004d "mpc83xx: Add NAND boot support
      for MPC8315E-RDB boards" symlinked nand_spl/board/freescale/mpc8315erdb to
      mpc8313erdb in order to not duplicate code.
      
      Since the main makefile builds nand_spl/board/$(BOARDDIR) (which makes sense),
      and the board Makefile and linker script are the only two necessary files
      to enable out-of-tree building, and other boards have duplicated nand makefiles
      (e.g. 8536ds & 8569mds), it only seems prudent to copy these two files in the
      name of the 8315 too.
      
      Signed-off-by: default avatarKim Phillips <kim.phillips@freescale.com>
      Cc: Anton Vorontsov <avorontsov@ru.mvista.com>
      Cc: Wolfgang Denk <wd@denx.de>
      fe389da6
  14. Jan 27, 2010
  15. Nov 05, 2009
  16. Oct 27, 2009
  17. Oct 16, 2009
  18. Oct 03, 2009
    • Stefan Roese's avatar
      ppc4xx: Big cleanup of PPC4xx defines · 297a6587
      Stefan Roese authored
      
      This patch cleans up multiple issues of the 4xx register (mostly
      DCR, SDR, CPR, etc) definitions:
      
      - Change lower case defines to upper case (plb4_acr -> PLB4_ACR)
      - Change the defines to better match the names from the
        user's manuals (e.g. cprpllc -> CPR0_PLLC)
      - Removal of some unused defines
      
      Please test this patch intensive on your PPC4xx platform. Even though
      I tried not to break anything and tested successfully on multiple
      4xx AMCC platforms, testing on custom platforms is recommended.
      
      Signed-off-by: default avatarStefan Roese <sr@denx.de>
      297a6587
  19. Sep 30, 2009
    • Mingkai Hu's avatar
      NAND boot: MPC8536DS support · 9a1a0aed
      Mingkai Hu authored
      
      MPC8536E can support booting from NAND flash which uses the
      image u-boot-nand.bin. This image contains two parts: a 4K
      NAND loader and a main U-Boot image. The former is appended
      to the latter to produce u-boot-nand.bin. The 4K NAND loader
      includes the corresponding nand_spl directory, along with the
      code twisted by CONFIG_NAND_SPL. The main U-Boot image just
      like a general U-Boot image except the parts that included by
      CONFIG_SYS_RAMBOOT.
      
      When power on, eLBC will automatically load from bank 0 the
      4K NAND loader into the FCM buffer RAM where CPU can execute
      the boot code directly. In the first stage, the NAND loader
      copies itself to RAM or L2SRAM to free up the FCM buffer RAM,
      then loads the main image from NAND flash to RAM or L2SRAM
      and boot from it.
      
      This patch implements the NAND loader to load the main image
      into L2SRAM, so the main image can configure the RAM by using
      SPD EEPROM. In the first stage, the NAND loader copies itself
      to the second to last 4K address space, and uses the last 4K
      address space as the initial RAM for stack.
      
      Obviously, the size of L2SRAM shouldn't be less than the size
      of the image used. If so, the workaround is to generate another
      image that includes the code to configure the RAM by SPD and
      load it to L2SRAM first, then relocate the main image to RAM
      to boot up.
      
      Signed-off-by: default avatarMingkai Hu <Mingkai.hu@freescale.com>
      Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
      9a1a0aed
  20. Sep 28, 2009
  21. Sep 11, 2009
    • Stefan Roese's avatar
      ppc4xx: Big cleanup of PPC4xx defines · d1c3b275
      Stefan Roese authored
      
      This patch cleans up multiple issues of the 4xx register (mostly
      DCR, SDR, CPR, etc) definitions:
      
      - Change lower case defines to upper case (plb4_acr -> PLB4_ACR)
      - Change the defines to better match the names from the
        user's manuals (e.g. cprpllc -> CPR0_PLLC)
      - Removal of some unused defines
      
      Please test this patch intensive on your PPC4xx platform. Even though
      I tried not to break anything and tested successfully on multiple
      4xx AMCC platforms, testing on custom platforms is recommended.
      
      Signed-off-by: default avatarStefan Roese <sr@denx.de>
      d1c3b275
  22. Aug 21, 2009
    • Wolfgang Denk's avatar
      Fix all linker scripts for older binutils versions (pre-2.16) · 1aada9cd
      Wolfgang Denk authored
      
      Commit f62fb999 fixed handling of all rodata sections by using a
      wildcard combined with calls to ld's builtin functions SORT_BY_ALIGNMENT()
      and SORT_BY_NAME().  Unfortunately these functions were only
      introduced with biunutils version 2.16, so the modification broke
      building with all tool chains using older binutils.
      
      This patch makes it work again.  This is done by omitting the use of
      these functions for such old tool chains.  This will result in
      slightly larger target binaries, as the rodata sections are no longer
      in optimal order alignment-wise which reauls in unused gaps, but the
      effect was found to be insignificant - especially compared to the fact
      that you cannot build U-Boot at all in the current state.
      
      As ld seems to have no support for conditionals we run the linker
      script through the C preprocessor which can be easily used to remove
      the unwanted function calls.
      
      Note that the C preprocessor must be run with the "-ansi" (or a
      "-std=") option to make sure all the system-specific predefined
      macros outside the reserved namespace are suppressed. Otherise, cpp
      might for example substitute "powerpc" to "1", thus corrupting for
      example "OUTPUT_ARCH(powerpc)" etc.
      
      Signed-off-by: default avatarWolfgang Denk <wd@denx.de>
      Cc: Mike Frysinger <vapier@gentoo.org>
      1aada9cd
    • Mingkai Hu's avatar
      NAND boot: fix nand_load overlap issue · 269610f6
      Mingkai Hu authored
      
      The code copy data from NAND flash block by block, so when
      the data length isn't a whole-number multiple of the block
      size, it will overlap the rest space.
      
      Signed-off-by: default avatarMingkai Hu <Mingkai.hu@freescale.com>
      Signed-off-by: default avatarScott Wood <scottwood@freescale.com>
      269610f6
  23. Jul 30, 2009
    • Stefan Roese's avatar
      ppc4xx: Canyonlands-NAND-boot: Support 2 Crucial 512MByte SODIMM's · 82a7edc7
      Stefan Roese authored
      
      Some Canyonlands boards are equipped with different SODIMM's. This is no
      problem with the "normal" NOR booting Canyonlands U-Boot, since it
      automatically detects the SODIMM's via SPD data and correctly configures
      them. But the NAND booting version is different. Here we only have 4k
      of image size to completely setup the hardware, including DDR2 setup.
      So we need to use a fixed DDR2 setup here. This doesn't work for different
      SODIMM's right now.
      
      Currently only this Crucial SODIMM is support:
      CT6464AC667.8FB (dual ranked)
      
      Now some boards are shipped with this SODIMM:
      CT6464AC667.4FE (single ranked)
      
      This patch now supports both SODIMM's by configuring first for the dual
      ranked DIMM. A quick shows, if this module is really installed. If this test
      fails, the DDR2 controller is re-configured for the single
      ranked SODIMM.
      
      Tested with those SODIMM's:
      
      CT6464AC667.8FB (dual ranked)
      CT6464AC667.4FE (single ranked)
      
      Signed-off-by: default avatarStefan Roese <sr@denx.de>
      82a7edc7
  24. Jul 16, 2009
  25. Jul 07, 2009
    • Scott Wood's avatar
      nand_spl: Fix cmd_ctrl usage in nand_boot.c. · 1dac3a51
      Scott Wood authored
      
      When adding large page NAND support to this file, I had a misunderstanding
      about the exact semantics of NAND_CTRL_CHANGE (which isn't documented
      anywhere I can find) -- it is apparently just a hint to drivers,
      which aren't required to preserve the old value for subsequent
      non-"change" invocations.
      
      This change makes nand_boot.c no longer assume this.  Note that this
      happened to work by chance with some NAND drivers, which don't preserve
      the value, but treat 0 equivalently to NAND_CTRL_ALE.
      
      I don't have hardware to test this, so any testing is appreciated.
      
      Signed-off-by: default avatarScott Wood <scottwood@freescale.com>
      1dac3a51
    • Guennadi Liakhovetski's avatar
      nand_spl: read environment early, when booting from NAND using nand_spl · b74ab737
      Guennadi Liakhovetski authored
      
      Currently, when booting from NAND using nand_spl, in the beginning the default
      environment is used until later in boot process the dynamic environment is read
      out. This way environment variables that must be interpreted early, like the
      baudrate or "silent", cannot be modified dynamically and remain at their
      default values. Fix this problem by reading out main and redundand (if used)
      copies of the environment in the nand_spl code.
      
      Signed-off-by: default avatarGuennadi Liakhovetski <lg@denx.de>
      Signed-off-by: default avatarScott Wood <scottwood@freescale.com>
      b74ab737
  26. Jul 06, 2009
  27. Jun 21, 2009
    • Magnus Lilja's avatar
      MX31: Add NAND SPL for i.MX31. · 40c642bc
      Magnus Lilja authored
      
      This patch adds the NAND SPL framework needed to boot i.MX31 boards
      from NAND.
      
      It has been tested on a i.MX31 PDK board with large page NAND. Small
      page NANDs should work as well, but this has not been tested.
      
      Note: The i.MX31 NFC uses a non-standard layout for large page NANDs,
      whether this is compatible with a particular setup depends on how
      the NAND device is programmed by the flash programmer (e.g. JTAG
      debugger).
      
      The patch is based on the work by Maxim Artamonov.
      
      Signed-off-by: default avatarMaxim Artamonov <scn1874@yandex.ru>
      Signed-off-by: default avatarMagnus Lilja <lilja.magnus@gmail.com>
      40c642bc
  28. May 15, 2009
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