Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Marius Gröger <mag@sysgo.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: George G. Davis <gdavis@mvista.com>

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Curt Brune <curt@cucy.com>

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Marius Gröger <mag@sysgo.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Alex Züpke <azu@sysgo.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>

Signed-off-by: Wolfgang Denk <wd@denx.de>

c2dd0d45 added dcache_enable()
to board_init_r(). This enables d-cache for all ARM boards.
As a result some of the arm boards that are not cache-ready
are broken. Revert this change and allow platform code to
take the decision on d-cache enabling.

Also add some documentation for cache usage in ARM.

Signed-off-by: Aneesh V <aneesh@ti.com>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stelian Pop <stelian.pop@leadtechdesign.com>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Gary Jennejohn <garyj@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Remove lpd7a400 and lpd7a404 boards.

Signed-off-by: Wolfgang Denk <wd@denx.de>

Remove edb9301, edb9302, edb9302a, edb9307, edb9307a, edb9312,
edb9315 and edb9315a boards.

Signed-off-by: Wolfgang Denk <wd@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Andrea Scian <andrea.scian@dave-tech.it>

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Rowel Atienza <rowel@diwalabs.com>

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: George G. Davis <gdavis@mvista.com>

This is a port of the official PLL errata workaround from Freescale to
mainline u-boot.
The PLL's in the i.MX51 processor can go out of lock due to a metastable
condition in an analog flip-flop when used at high frequencies.
This workaround implements an undocumented feature in the PLL (dither
mode), which causes the effect of this failure to be much lower (in terms
of frequency deviation), avoiding system failure, or at least decreasing
the likelihood of system failure.

Signed-off-by: David Jander <david@protonic.nl>

This describes what it is for, devices supported, how to enable for your
board in U-Boot, setting up the server, and notes about MAC addresses.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Eric Bénard <eric@eukrea.com>

There was a mix of UTF-8 and ISO-8859 files in the U-Boot source
tree, which could cause issues with the patchwork review system.
This commit converts all ISO-8859 files to UTF-8.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>

Since all currently supported at91rm9200 boards are migrated to at91
support the joining notice can be removed.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

Recieve/Receive
recieve/receive
Interupt/Interrupt
interupt/interrupt
Addres/Address
addres/address

Signed-off-by: Mike Williams <mike@mikebwilliams.com>

creating an u-boot.ubl file, which contains the UBL Header
needed for booting from NAND with the RBL from TI. For more
information read doc/README.ublimage.

Signed-off-by: Heiko Schocher <hs@denx.de>

Command calls update_tftp() analogous to automatic update described
in doc/README.update.

Usage:
fitupd [addr]
        - run update from FIT image at addr
          or from tftp 'updatefile'

Signed-off-by: Andreas Pretzsch <apr@cn-eng.de>

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>

P2041RDB Specification:
-----------------------
Memory subsystem:
 * 4Gbyte unbuffered DDR3 SDRAM SO-DIMM(64bit bus)
 * 128 Mbyte NOR flash single-chip memory
 * 256 Kbit M24256 I2C EEPROM
 * 16 Mbyte SPI memory
 * SD connector to interface with the SD memory card

Ethernet:
 * dTSEC1: connected to the Vitesse SGMII PHY (VSC8221)
 * dTSEC2: connected to the Vitesse SGMII PHY (VSC8221)
 * dTSEC3: connected to the Vitesse SGMII PHY (VSC8221)
 * dTSEC4: connected to the Vitesse RGMII PHY (VSC8641)
 * dTSEC5: connected to the Vitesse RGMII PHY (VSC8641)

PCIe:
 * Lanes E, F, G and H of Bank1 are connected to one x4 PCIe SLOT1
 * Lanes C and Land D of Bank2 are connected to one x4 PCIe SLOT2

SATA: Lanes C and Land D of Bank2 are connected to two SATA connectors

USB 2.0: connected via a internal UTMI PHY to two TYPE-A interfaces

I2C:
 * I2C1: Real time clock, Temperature sensor, Memory module
 * I2C2: Vcore Regulator, 256Kbit I2C Bus EEPROM, PCIe slot1/2

UART: supports two UARTs up to 115200 bps for console

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

Specify hwconfig usage for USB mode and phy change

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

The P1023RDS board is the reference board for the P1023 SoC.

Add support for booting it from NOR or NAND, with fixed 2G of DDR, PCIe,
UART, I2C, etc.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Signed-off-by: Lei Xu <B33228@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

Includes board config file, documentation, maintainer and boards.cfg
entries, and board specific files in vendor dir.

Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>

Add another nand write. variant, trimffs. This command will request of
nand_write_skip_bad() that all trailing all-0xff pages will be
dropped from eraseblocks when they are written to flash as-per the
reccommended behaviour of the UBI FAQ [1].

The function that implements this timming is the drop_ffs() function
by Artem Bityutskiy, ported from the mtd-utils tree.

[1] http://www.linux-mtd.infradead.org/doc/ubi.html#L_flasher_algo



Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
CC: Artem Bityutskiy <dedekind1@gmail.com>
CC: Detlev Zundel <dzu@denx.de>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>

The 'trab' board configuration is broken, and there is nobody who is
interested and willing to fix it.  Drop it.

This includes support for VFD displays which have always been used by
this board only.

Signed-off-by: Wolfgang Denk <wd@denx.de>

Drop wepep250 board from MAINTAINERS and add all these three boards to
doc/README.scrapyard

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>

Signed-off-by: Wolfgang Denk <wd@denx.de>