AVR32: Make cacheflush cpu-dependent

The AT32UC3A series of processors doesn't contain any cache, and issuing
cache control instructions on those will cause an exception. This commit
makes cacheflush.h arch-dependent in preparation for the AT32UC3A-support.

Signed-off-by: Gunnar Rangoy <gunnar@rangoy.com>
Signed-off-by: Paul Driveklepp <pauldriveklepp@gmail.com>
Signed-off-by: Olav Morken <olavmrk@gmail.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>

board/atmel/atstk1000/flash.c

@@ -22,7 +22,7 @@
 #include <common.h>
 
 #ifdef CONFIG_ATSTK1000_EXT_FLASH
-#include <asm/cacheflush.h>
+#include <asm/arch/cacheflush.h>
 #include <asm/io.h>
 #include <asm/sections.h>
 

board/earthlcd/favr-32-ezkit/flash.c

@@ -20,7 +20,7 @@
 #include <common.h>
 
 #ifdef CONFIG_FAVR32_EZKIT_EXT_FLASH
-#include <asm/cacheflush.h>
+#include <asm/arch/cacheflush.h>
 #include <asm/io.h>
 #include <asm/sections.h>
 

cpu/at32ap/cache.c

@@ -22,7 +22,7 @@
 
 #include <common.h>
 
-#include <asm/cacheflush.h>
+#include <asm/arch/cacheflush.h>
 
 void dcache_clean_range(volatile void *start, size_t size)
 {

include/asm-avr32/dma-mapping.h

@@ -23,7 +23,7 @@
 #define __ASM_AVR32_DMA_MAPPING_H
 
 #include <asm/io.h>
-#include <asm/cacheflush.h>
+#include <asm/arch/cacheflush.h>
 
 enum dma_data_direction {
 	DMA_BIDIRECTIONAL	= 0,

lib_avr32/board.c

@@ -86,7 +86,7 @@ void *sbrk(ptrdiff_t increment)
 }
 
 #ifdef CONFIG_SYS_DMA_ALLOC_LEN
-#include <asm/cacheflush.h>
+#include <asm/arch/cacheflush.h>
 #include <asm/io.h>
 
 static unsigned long dma_alloc_start;