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vesta
u-boot-2015.04
Commits
9295acb7
Commit
9295acb7
authored
18 years ago
by
Markus Klotzbuecher
Committed by
Markus Klotzbuecher
18 years ago
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SPC1920: add support for the FM18L08 Ramtron FRAM
parent
38ccd2fd
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board/spc1920/spc1920.c
+5
-0
5 additions, 0 deletions
board/spc1920/spc1920.c
include/configs/spc1920.h
+14
-1
14 additions, 1 deletion
include/configs/spc1920.h
with
19 additions
and
1 deletion
board/spc1920/spc1920.c
+
5
−
0
View file @
9295acb7
...
...
@@ -175,6 +175,11 @@ long int initdram (int board_type)
/* initalize the DSP Host Port Interface */
hpi_init
();
/* PLD Setup */
memctl
->
memc_or4
=
CFG_OR4_PRELIM
;
memctl
->
memc_br4
=
CFG_BR4_PRELIM
;
udelay
(
1000
);
/* PLD Setup */
memctl
->
memc_or5
=
CFG_OR5_PRELIM
;
memctl
->
memc_br5
=
CFG_BR5_PRELIM
;
...
...
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include/configs/spc1920.h
+
14
−
1
View file @
9295acb7
...
...
@@ -391,11 +391,24 @@
#define HPI_HPID_NOINC_2 HPI_REG(0x300000c + 2)
#endif
/* CONFIG_SPC1920_HPI_TEST */
/*
* Ramtron FM18L08 FRAM 32KB on CS4
*/
#define CFG_SPC1920_FRAM_BASE 0x80100000
#define CFG_PRELIM_OR4_AM 0xffff8000
#define CFG_OR4_PRELIM (CFG_PRELIM_OR4_AM | \
OR_ACS_DIV2 | \
OR_BI | \
OR_SCY_4_CLK | \
OR_TRLX)
#define CFG_BR4_PRELIM ((CFG_SPC1920_FRAM_BASE & BR_BA_MSK) | BR_PS_8 | BR_V);
/*
* PLD CS5
*/
#define CFG_SPC1920_PLD_BASE 0x80000000
#define CFG_PRELIM_OR5_AM 0xfff
00
000
#define CFG_PRELIM_OR5_AM 0xfff
f8
000
#define CFG_OR5_PRELIM (CFG_PRELIM_OR5_AM | \
OR_CSNT_SAM | \
...
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