MLK-13336 mx6sll_arm2: Update LPDDR2 script to v2.1

Changes:
Version 2.1
  -Issue a Precharge-All command prior to the MRW Reset command.
      setmem /32 0x021B001C = 0x00008050  // [MMDC_MDSCR]  precharge all to CS0
      setmem /32 0x021B001C = 0x00008058  // [MMDC_MDSCR]  precharge all to CS1

  -Update MMDC PHY Read/Write delay-lines Configuration Register according to calibration results
      setmem /32 0x021B0848 = 0x3A383C40   // [MMDC_MPRDDLCTL]
      setmem /32 0x021B0850 = 0x242C3020   // [MMDC_MPWRDLCTL]

File:
http://compass.freescale.net/livelink/livelink?func=ll&objId=235701297&objAction=browse&viewType=1



Test:
Passed overnight memtester on one i.MX6SLL LPDDR2 ARM2 board.

Signed-off-by: Ye Li <ye.li@nxp.com>