- Oct 03, 2011
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Marek Vasut authored
Signed-off-by:
Marek Vasut <marek.vasut@gmail.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> [scottwood@freescale.com: use chip instead of redundant priv_nand] Signed-off-by:
Scott Wood <scottwood@freescale.com>
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Helmut Raiger authored
When writing 0x4000 to the unlockend_blkaddr register, large writes to a 2k page NAND sometimes fail. The current kernel driver writes 0xFFFF to this register for V2 of the nand controller. However on an i.MX31 this also fixes writes larger than 32MB. The datasheet is very unspecific, but (0x4000=16384)*2000 roughly fits the limits we're encountering with NAND writes. This problem might be NAND chip specific. Signed-off-by:
Helmut Raiger <helmut.raiger@hale.at> Signed-off-by:
Scott Wood <scottwood@freescale.com>
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Helmut Raiger authored
Signed-off-by:
Helmut Raiger <helmut.raiger@hale.at> Signed-off-by:
Scott Wood <scottwood@freescale.com>
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Stefan Bigler authored
The new SAMSUNG NAND Flash K9F1G08U0D require a bigger chip_delay. The Data Transfer from Cell to Register is >= 35us. Other Vendors and older chips normally use >= 25us. To have enough margin 40us is selected. Signed-off-by:
Stefan Bigler <stefan.bigler@keymile.com> Signed-off-by:
Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Stefan Roese <sr@denx.de> Signed-off-by:
Scott Wood <scottwood@freescale.com>
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- Oct 01, 2011
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Marek Vasut authored
vmt.c: In function ‘ubi_free_volume’: vmt.c:681:6: warning: variable ‘err’ set but not used [-Wunused-but-set-variable] Signed-off-by:
Marek Vasut <marek.vasut@gmail.com> Acked-by:
Mike Frysinger <vapier@gentoo.org>
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Marek Vasut authored
nand_bbt.c: In function ‘search_bbt’: nand_bbt.c:465:6: warning: variable ‘bits’ set but not used [-Wunused-but-set-variable] Signed-off-by:
Marek Vasut <marek.vasut@gmail.com> Cc: Scott Wood <scottwood@freescale.com>
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Marek Vasut authored
ipu_disp.c: In function ‘ipu_disp_set_global_alpha’: ipu_disp.c:1237:11: warning: variable ‘flow’ set but not used [-Wunused-but-set-variable] ipu_disp.c: In function ‘ipu_disp_set_color_key’: ipu_disp.c:1302:16: warning: variable ‘flow’ set but not used [-Wunused-but-set-variable] Signed-off-by:
Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de>
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Graeme Russ authored
There are some locations in the code which anticipate printf() being called before the console is ready by squelching printf() on gd->have_console. Move this squelching into printf(), vprintf(), puts() and putc(). Also make tstc() and getc() return 0 if console is not yet initialised Signed-off-by:
Graeme Russ <graeme.russ@gmail.com> Tested-by:
Simon Glass <sjg@chromium.org>
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Dave Aldridge authored
If CONFIG_SYS_NS16550_MEM32 is defined then 32 bit memory mapped access will be used to read/write the uart registers. This is especially useful for SoC devices that implement 16550 compatible uarts but that have peripheral access width constraints. Signed-off-by:
Dave Aldridge <fovsoft@gmail.com>
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- Sep 30, 2011
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Marek Vasut authored
mxc_ata.c: In function ‘set_ata_bus_timing’: mxc_ata.c:118: warning: dereferencing type-punned pointer will break strict-aliasing rules mxc_ata.c:125: warning: dereferencing type-punned pointer will break strict-aliasing rules mxc_ata.c:129: warning: dereferencing type-punned pointer will break strict-aliasing rules Signed-off-by:
Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de>
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Marek Vasut authored
Rewrite the mxc_i2c driver. * This version is much closer to Linux implementation. * Fixes IPG_PERCLK being incorrectly used as clock source * Fixes behaviour of the driver on iMX51 * Clean up coding style a bit ;-) Signed-off-by:
Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Jason Hui <jason.hui@linaro.org> Acked-by:
Jason Liu <jason.hui@linro.org> Acked-by:
Heiko Schocher <hs@denx.de> Tested-by:
Jason Liu <jason.hui@linro.org>
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Marek Vasut authored
Signed-off-by:
Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
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Marek Vasut authored
Signed-off-by:
Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
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Marek Vasut authored
Signed-off-by:
Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
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Marek Vasut authored
Signed-off-by:
Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
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Marek Vasut authored
This patch allows user to register multiple FEC controllers. To preserve compatibility with older boards, the mxcfec_register() call is still in place. To use multiple controllers, new macro is in place, the mxcfec_register_multi(), which takes more arguments. The syntax is: mxcfec_register_multi(bd, FEC ID, FEC PHY ID on the MII bus, base address); To disable the fecmxc_register() compatibility stuff, define the macro CONFIG_FEC_MXC_MULTI. This will remove the requirement for defining IMX_FEC_BASE and CONFIG_FEC_MXC_PHYADDR. Signed-off-by:
Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
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Marek Vasut authored
Signed-off-by:
Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
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Marek Vasut authored
The default is MII100, which was hardcoded previously in the driver. Signed-off-by:
Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
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Marek Vasut authored
Signed-off-by:
Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
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Marek Vasut authored
Signed-off-by:
Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
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Marek Vasut authored
Signed-off-by:
Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
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Marek Vasut authored
Signed-off-by:
Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
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Jason Liu authored
This is cosmetic patch for the help message: Before: pmic dump [numregs] dump registers After: pmic dump [numregs] - dump registers Signed-off-by:
Jason Liu <jason.hui@linaro.org> Acked-by:
Stefano Babic <sbabic@denx.de>
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Heiko Schocher authored
Signed-off-by:
Heiko Schocher <hs@denx.de> Cc: Paulraj Sandeep <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Heiko Schocher authored
Once the MDIO state machine has been initialized and enabled, it starts polling all 32 PHY addresses on the MDIO bus, looking for an active PHY. Add a 5 ms delay, so all PHYs are for sure detected. This problem was detected on the cmc board with a KSZ8864 switch. Signed-off-by:
Heiko Schocher <hs@denx.de> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Heiko Schocher authored
The PHY driver was too verbose and corrupted the boot message display like this: ... Net: Ethernet PHY: KSZ8873 @ 0x02 DaVinci-EMAC ... Turn printf() into debug() so we get the expected output again: ... Net: DaVinci-EMAC ... Signed-off-by:
Heiko Schocher <hs@denx.de> cc: Paulraj Sandeep <s-paulraj@ti.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Heiko Schocher authored
Signed-off-by:
Heiko Schocher <hs@denx.de> Cc: Paulraj Sandeep <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Mike Frysinger <vapier@gentoo.org> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Heiko Schocher authored
Signed-off-by:
Heiko Schocher <hs@denx.de> Cc: Paulraj Sandeep <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Balaji T K authored
Config VMMC voltage to 3V for MMC/SD card slot and PBIAS settings needed for OMAP4 Fixes MMC/SD detection on boot from eMMC. Signed-off-by:
Balaji T K <balajitk@ti.com> Signed-off-by:
Aneesh V <aneesh@ti.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Balaji T K authored
Enable high capacity to host capability. Fixes eMMC detection on boot from MMC/SD card. Signed-off-by:
Balaji T K <balajitk@ti.com> Signed-off-by:
Aneesh V <aneesh@ti.com> Acked-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Simon Schwarz authored
Adds NAND library to SPL. Signed-off-by:
Simon Schwarz <simonschwarzcor@gmail.com> Acked-by:
Scott Wood <scottwood@freescale.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Ajay Bhargav authored
This patch adds support for Fast Ethernet Controller driver for Armada100 series. Signed-off-by:
Ajay Bhargav <ajay.bhargav@einfochips.com> Signed-off-by:
Prafulla Wadaskar <prafulla@marvell.com>
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Ajay Bhargav authored
This patch adds generic GPIO driver framework support for Marvell SoCs. To enable GPIO driver define CONFIG_MARVELL_GPIO and for GPIO commands define CONFIG_CMD_GPIO in your board configuration file. Signed-off-by:
Ajay Bhargav <ajay.bhargav@einfochips.com>
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- Sep 29, 2011
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Shaohui Xie authored
Signed-off-by:
Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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- Sep 28, 2011
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Wolfgang Denk authored
This reverts commit 041c5422. The lines removed by this commit weren't redundant. The logic is (and probably should be better commented): Find the intersection of the advertised capabilities of both sides of the link (lpa). From that intersection, find the highest capability we can run at (that will be the negotiated link). Now imagine that the intersection (lpa) is (LPA_100HALF | LPA_10FULL). The code will now set phydev->speed to 100, and phydev->duplex to 1, but this link does not support 100FULL. Kudos to Andy Fleming <afleming@gmail.com> for binging this to attention and for the explanation. Signed-off-by:
Wolfgang Denk <wd@denx.de>
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- Sep 24, 2011
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Marek Vasut authored
Signed-off-by:
Marek Vasut <marek.vasut@gmail.com>
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- Sep 21, 2011
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Vadim Bendebury authored
On some systems, we get a warning when %lu is used with size_t's, so use the correct format string. Signed-off-by:
Vadim Bendebury <vbendeb@chromium.org> Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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- Sep 12, 2011
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Michael Jones authored
Signed-off-by:
Michael Jones <michael.jones@matrix-vision.de> Acked-by:
Heiko Schocher <hs@denx.de> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Michael Jones authored
This allows the EEPROM layer to send a single i2c write command per page, and wait CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS between i2c write commands. Signed-off-by:
Michael Jones <michael.jones@matrix-vision.de> Acked-by:
Heiko Schocher <hs@denx.de> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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- Sep 11, 2011
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Wolfgang Denk authored
Signed-off-by:
Wolfgang Denk <wd@denx.de>
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