- Relocate the location of U-Boot in the flash
- Save the environment in one sector of the flash memory
- MTD Support

Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
Signed-off-by: Stefan Roese <sr@denx.de>

- Change suggested by WD

Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
Signed-off-by: Stefan Roese <sr@denx.de>

This patch allows booting from FLASH the ML507 board by Xilinx.
Previously, U-Boot needed to be loaded from JTAG or a Sytem ACE CF

Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
Signed-off-by: Stefan Roese <sr@denx.de>

Signed-off-by: Stefan Roese <sr@denx.de>

The Xilinx ML507 Board is a Virtex 5 prototyping board that includes,
	among others:
	-Virtex 5 FX FPGA (With a ppc440x5 in it)
	-256MB of SDRAM2
	-32MB of Flash
	-I2C Eeprom
	-System ACE chip
	-Serial ATA connectors
	-RS232 Level Conversors
	-Ethernet Transceiver

This patch gives support to a standard design produced by EDK for this
board: ppc440, uartlite, xilinx_int and flash

- Includes Changes propossed by Stefan Roese and Michal Simek

Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
Acked-by: Stefan Roese <sr@denx.de>

-This patchs gives support for the embbedded ppc440
 on the Virtex5 FPGAs
-interrupts.c divided in uic.c and interrupts.c
-xilinx_irq.c for xilinx interrupt controller
-Include modifications propossed by  Stefan Roese

Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
Acked-by: Stefan Roese <sr@denx.de>

Signed-off-by: Stefan Roese <sr@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Round the serial port clock divisor value returned by
calc_divisor()

Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>

on the network with it's offered IP number; it should not reply until
after it has received a DHCP ACK message. Also ensures that U-Boot
does it's DHCPREQUEST as broadcast (per RFC 2131).

Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>

This got changed by commit 93c56f21
[cfi_flash: support of long cmd in U-boot.]

Long is the wrong type because it will behave differently on 64bit
machines in a way that is probably not expected. u32 should be
enough.

Cc: Alexey Korolev <akorolev@infradead.org>
Cc: Vasiliy Leonenko <vasiliy.leonenko@mail.ru>
Signed-off-by: Sebastian Siewior <bigeasy@linutronix.de>

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

The MVBC_P is a MPC5200B based camera system with Intel Gigabit ethernet
controller (using e1000) and custom Altera Cyclone-II FPGA on PCI.

Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>

Update the sys_eeprom.c file to handle both NXID and CCID EEPROM formats.  The
NXID format replaces the older CCID format, but it's important to support both
since most boards out there still use the CCID format.  This change is in
preparation for using one file to handle both formats.  This will also unify
EEPROM support for all Freescale 85xx and 86xx boards.

Also update the 86xx board header files to use the standard CFG_I2C_EEPROM_ADDR
instead of ID_EEPROM_ADDR.

Signed-off-by: Timur Tabi <timur@freescale.com>

Add function of new PCI, pci_skip_dev and pci_print_dev.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

The L2_INIT_RAM option was unused, and recent changes to the TLB code
meant that the INIT_RAM TLBs weren't being cleared out.  In order to reduce
the amount of mapped space attached to nothing, we change things so the TLBs
get cleared.

Signed-off-by: Andy Fleming <afleming@freescale.com>

The fake flash bank was generating errors for anyone who didn't have a
PromJET hooked up to the board.  As that constitutes the vast majority of
users, we remove it.

Signed-off-by: Andy Fleming <afleming@freescale.com>

Add support for using a PCIe ATI Video card on PCIe2.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

Add new L1/L2 SPRs related to e500mc cache config and control.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

The L2 size detection code was a bit confusing and we kept having to add
code to it to handle new processors.  Change the sense of detection so we
look for the older processors that aren't changing.

Also added support for 1M cache size on 8572.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

Make the default build for the sbc8560 board be powerpc
capable with libfdt support.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>

This was proposed by Paul Gortmaker in response to Wolfgang's comments on
similar #defines in sbc8560.h.

Signed-off-by: Andy Fleming <afleming@freescale.com>

Add in the default fdt settings and the typical EXTRA_ENV
settings as borrowed from the mpc8560ads.  Fix a couple
of stale references to the mpc8560ads dating back to the
original clone/fork.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>

Add in for the sbc8560, the ft_board_setup() routine, based on what is
in use for the Freescale MPC8560ADS board.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>

The existing config doesn't define CONFIG_HAS_ETH0, and so the
fdt support doesn't update the zeros in the dtb local-mac with
real data from the u-boot env.  Since the existing config is
tailored to just two interfaces, get rid of the ETH2 definitions
at the same time.

Also don't include any end user specific data into the environment
by default -- things like MAC address, network parameters etc. need
to come from the end user.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>

The sbc8560 board ships with 512MB of memory installed,
but the current cs0_bnds is hard coded for 256MB.  Set the
value based on CFG_SDRAM_SIZE.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>

The definitions for the TSEC have become out of date.  There is no
longer any such options like "CONFIG_MPC85xx_TSEC1" or similar.
Update to match those of other boards, like the MPC8560ADS.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>

Some boards that have external 16550 UARTs don't have a direct
tie between bi_busfreq and the clock used for the UARTs.  Boards
that do have such a tie should set CFG_NS16550_CLK to be
get_bus_freq(0) -- which most of them do already.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>

With a page size of BOOKE_PAGESZ_16M, both the real and effective
addresses must be multiples of 16MB.  The hardware silently truncates
them so the code happens to work.  This patch clarifies the situation
by establishing addresses that the hardware doesn't need to truncate.

Signed-off-by: Andrew Klossner <andrew@cesa.opbu.xerox.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>

Delete the crypto node if not on an E-processor.  If on 8360 or 834x family,
check rev and up-rev crypto node (to SEC rev. 2.4 property values)
if on an 'EA' processor, e.g. MPC8349EA.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>

ARM DaVinci: Remove extern phy_t declaration by moving
code to proper place.

Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>

ARM DaVinci: Remove duplicate definitions of MACH_TYPE
and prototype of i2c_init().

Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>