- Oct 17, 2011
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Stefano Babic authored
The framebuffer driver for MX5 is based on CONFIG_LCD. In the current implementation, there is a serious bug because the required memory is allocated before relocation, but the driver knows only later which is the resolution of the display. The patch switches the driver to CONFIG_VIDEO and the memory is allocated by the driver itself. We also need to switch the vision2 board code and config file in the same commit so that this commit will be bisectable. Signed-off-by:
Stefano Babic <sbabic@denx.de> CC: Anatolij Gustschin <agust@denx.de> Tested-by:
Stefano Babic <sbabic@denx.de> Signed-off-by:
Anatolij Gustschin <agust@denx.de>
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Mike Frysinger authored
In the recent dropping of !NET_MULTI code (commit e2a53458), I misread the logic in include/net.h. Some of it was used by NET_MULTI code as glue between the multi/non-multi worlds for cpm2 boards. Rather than restore the block of code, push the logic to the board config headers where it all belongs. Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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- Oct 15, 2011
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Mike Frysinger authored
No code defines or calls this, so drop the prototype. Signed-off-by:
Mike Frysinger <vapier@gentoo.org> Acked-by:
Simon Glass <sjg@chromium.org>
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Anatolij Gustschin authored
A delay of approximately 250 ms after PCI bus reset in pci_mpc5xxx_init() is needed to recognize the Coral-PA controller on the graphic extention board. Signed-off-by:
Anatolij Gustschin <agust@denx.de> Acked-by:
Detlev Zundel <dzu@denx.de>
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Michal Simek authored
Add axi_ethernet driver for little-endian Microblaze. RX/TX BDs and rxframe buffer are shared among all axi_ethernet MACs. Only one MAC can work in one time. Signed-off-by:
Michal Simek <monstr@monstr.eu> Acked-by:
Mike Frysinger <vapier@gentoo.org>
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Timur Tabi authored
fdt_create_phandle() was ignoring errors from fdt_set_phandle(). If an error occurs, print an error message and return 0, which is an invalid phandle. We also need to change the return type for fdt_create_phandle() to indicate that it cannot return an error code. Signed-off-by:
Timur Tabi <timur@freescale.com>
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Chunhe Lan authored
The do_fixup_by_path_string() will set the specified node's property to the value contained in "status". It would just be an inline wrapper for do_fixup_by_path() that calls strlen on the argument. Signed-off-by:
Chunhe Lan <Chunhe.Lan@freescale.com>
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- Oct 14, 2011
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Kumar Gala authored
With older compilers (gcc-4.2.x) we run into issues that resulting image is too large. We can save a bunch of space by removing the video support. In general video support on these boards is a nice to have since it requires a PCIe add-on card. Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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chenhui zhao authored
Signed-off-by:
Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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chenhui zhao authored
- Rework tlb and law tables. - PCI2 is not available on MPC8548CDS, so remove it. - Move the memory map to the board config file. - Rewrite the board info according to the manual. - Remove unnecessary macros and redefine some macros to align with other boards. - Fix some typos. Signed-off-by:
Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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- Oct 12, 2011
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Xiangfu Liu authored
Add support for the qi_lb60 (a.k.a QI Ben NanoNote) clamshell device from Qi hardware: http://en.qi-hardware.com/wiki/Ben_NanoNote http://en.qi-hardware.com/wiki/Main_Page http://en.wikipedia.org/wiki/Qi_hardware This Jz4740-based clamshell device does not use NOR flash to boot. The initial bring-up assumes that U-Boot is directly loaded into SDRAM using USB boot tool, and starts from 0x80100000. About USB boot tool ------------------- Jz4740 is one of the XBurst processors with USB boot functionality supported. The CPU can boot from a small ROM in the LSI, initialize CPU and USB module, then wait for USB commands from the USB host. We can send 8 KB binary data to the CPU cache using USB boot tool. USB boot tool is available to the public at Ingenic website. Also there is an alternative Debian package named xburst-tools. Signed-off-by:
Xiangfu Liu <xiangfu@openmobilefree.net> Acked-by:
Daniel <zpxu@ingenic.cn> Signed-off-by:
Shinya Kuribayashi <skuribay@pobox.com>
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Dirk Eibach authored
Some intip boards don't seem to run stable with CL4, datasheets suggest that CL5 is the safe value. Signed-off-by:
Dirk Eibach <eibach@gdsys.de> Signed-off-by:
Stefan Roese <sr@denx.de>
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Dirk Eibach authored
Fan PWM lookuptable was modified to start at 46 degrees celsius instead of 40 degrees celsius. Signed-off-by:
Dirk Eibach <eibach@gdsys.de> Signed-off-by:
Stefan Roese <sr@denx.de>
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Dirk Eibach authored
Use CONFIG_AUTOBOOT_KEYED on intip so that booting can only be stopped with well defined keypresses. Signed-off-by:
Dirk Eibach <eibach@gdsys.de> Signed-off-by:
Stefan Roese <sr@denx.de>
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- Oct 09, 2011
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Xie Xiaobo authored
MPC8536DS offer booting from SDcard or SPI flash. This patch defined that u-boot can save the environment variables on SDcard or SPI flash when booting from the related device. The Env parameter region and linux kernel region have overlap in SPI-Flash, So change the Env param saving address. Signed-off-by:
Xie Xiaobo <r63061@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Fanzc authored
Add EHCI controller and USB command definition. Signed-off-by:
Xie Xiaobo <r63061@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Xie Xiaobo authored
1. The SD_DATA[4:7] signals are shared with the SPI chip selects on 8536DS, so don't set MPC85xx_PMUXCR_SD_DATA that config eSDHC data bus-width to 4-bit and enable SPI signals. 2. Add eSPI controller and SPI-FLASH definition. Signed-off-by:
Xie Xiaobo <r63061@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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chenhui zhao authored
- Increase the size of malloc space. - Enable e1000 network card. - Show pci devices on startup. - Change the location of env address. - Use hwconfig to turn off ECC by default. [Kumar Gala] Fixed white space formating for CONFIG_EXTRA_ENV_SETTINGS Signed-off-by:
Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Becky Bruce authored
We really shouldn't be overwriting bat registers with translation enabled, especially when we're executing code using one of them for translating the current instruction stream. Instead, disable address translation while doing the final BAT setup. In order to do this, setup_bats has to move back to asm code, because we require translation to be enabled to have a stack for C code. The yucky thing about that is that the assembler doesn't like ULL so we have to switch to using HIGH/LOW pairs for physical addresses that are > 32 bits in length. Signed-off-by:
Becky Bruce <beckyb@kernel.crashing.org> Acked-by:
York Sun <yorksun@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Becky Bruce authored
There were duplicate (and conflicting) defines for the BATs used to cover SRIO. Drop the bogus set. Signed-off-by:
Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Timur Tabi authored
The macro CONFIG_ENABLE_36BIT_PHYS is used to indicate that the given SOC is capable of 36-bit physical addresses, even if such large addresses are not used. On two boards, this macro was enabled only when building a 36-bit image. Signed-off-by:
Timur Tabi <timur@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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York Sun authored
Interactive DDR debugging provides a user interface to view and modify SPD, DIMM parameters, board options and DDR controller registers before DDR is initialized. With this feature, developers can fine-tune DDR for board bringup and other debugging without frequently having to reprogram the flash. To enable this feature, define CONFIG_FSL_DDR_INTERACTIVE in board header file and set an environment variable to activate it. Syntax: setenv ddr_interactive on After reset, U-boot prompts before initializing DDR controllers FSL DDR> The available commands are print print SPD and intermediate computed data reset reboot machine recompute reload SPD and options to default and recompute regs edit modify spd, parameter, or option compute recompute registers from current next_step to end next_step shows current next_step help this message go program the memory controller and continue with u-boot The first command should be "compute", which reads data from DIMM SPDs and board options, performs the calculation then stops before setting DDR controller. A user can use "print" and "edit" commands to view and modify anything. "Go" picks up from current step with any modification and compltes the calculation then enables the DDR controller to continue u-boot. "Recompute" does it over from fresh reading. Signed-off-by:
York Sun <yorksun@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Michal Simek authored
Add support for SERIAL MULTI for uartlite. Signed-off-by:
Michal Simek <monstr@monstr.eu>
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Stefan Roese authored
While adding asm/cache.h to common.h for PPC targets, I got an error about multiple definitions of some DBSR_ macros. While scanning these defines, I noticed that some where defined not correctly for all PPC variants. So I removed all unused defines, and corrected the ones really used by bedbug (book-e vs. ppc40x). Signed-off-by:
Stefan Roese <sr@denx.de> Cc: Wolfgang Denk <wd@denx.de>
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Stefan Roese authored
This is needed for the patch "cache: add default setting for CONFIG_SYS_CACHELINE_SIZE" from Anton Staaf. As cache.h defines CONFIG_SYS_CACHELINE_SIZE for PPC targets. This will remove the following warnings/errors: include/common.h:819:2: warning: #warning CONFIG_SYS_CACHELINE_SIZE not defined, using __BIGGEST_ALIGNMENT__ cache.c:33: error: '__BIGGEST_ALIGNMENT__' undeclared (first use in this function) Signed-off-by:
Stefan Roese <sr@denx.de> Cc: Anton Staaf <robotboy@chromium.org> Cc: Wolfgang Denk <wd@denx.de>
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- Oct 05, 2011
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Mike Frysinger authored
Now that none of the core checks CONFIG_NET_MULTI, there's not much point in boards defining it. So scrub all references to it. Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
This is long over due. All but two net drivers have been converted, but those have now been dropped. The only thing left to do is actually delete all references to NET_MULTI and code that is compiled when that is not defined. So here we scrub the core code. Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
This driver was never converted to NET_MULTI, and no board uses it. So punt it and be done. Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
These drivers have never been converted to NET_MULTI, and they are only used by one board (BMW). So drop the drivers until someone feels like rewriting them for NET_MULTI support. Rather than punting the BMW board completely, just disable net support in its board config. Seems to build fine without it. Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
This pushes the ugly duplicated arch ifdef lists we maintain in various image related files out to the arch headers themselves. Acked-by:
Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Tested-by:
Thomas Chou <thomas@wytron.com.tw> Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Valentin Longchamp authored
The current km_arm boards have a Power-On test jumper. When this jumper is set, this triggers some Power-On tests on the board. This patch enables the support of this jumper for starting the memory_regions test when the jumper is set. Signed-off-by:
Valentin Longchamp <valentin.longchamp@keymile.com> Signed-off-by:
Holger Brunck <holger.brunck@keymile.com> Cc: Prafulla Wadaskar <prafulla@marvell.com>
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Valentin Longchamp authored
This allows to test a larger part of the RAM in the memory tests. Signed-off-by:
Valentin Longchamp <valentin.longchamp@keymile.com> Signed-off-by:
Holger Brunck <holger.brunck@keymile.com> Cc: Heiko Schocher <hs@denx.de> Cc: Prafulla Wadaskar <prafulla@marvell.com>
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Valentin Longchamp authored
This test is similar to the actual POST memory test but quicker and far less complete. It checks the address and data lines and then only tests some regularly placed sub regions of the RAM. This can be useful when we want to test the RAM but we do not have enough time to run the full memory test. The POST memory test code was rearranged in order to avoid code duplication between the two tests but the memory test functionnality remains the same. Signed-off-by:
Valentin Longchamp <valentin.longchamp@keymile.com> Signed-off-by:
Holger Brunck <holger.brunck@keymile.com> Ackey-by:
Mike Frysinger <vapier@gentoo.org>
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Valentin Longchamp authored
The predefinde post_word_load/store functions do not fit all boards, so we introduce a way to define post_word_load/store as externs in post.h that then can be defined in board specific files. This is done with the CONFIG_POST_EXTERNAL_WORD_FUNCS #define Signed-off-by:
Valentin Longchamp <valentin.longchamp@keymile.com> Signed-off-by:
Holger Brunck <holger.brunck@keymile.com>
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- Oct 04, 2011
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Wolfgang Denk authored
This reverts commit 60ce53cf. The commit causes build breakage for a number of boards. This results from the fact that now the arguments of debug() actually get referenced (even if there is hope that the compiler will optimize away the debug() call). The obvious fix to that probem (change the code to always declare the referenced variables and data structures) increases the code size, and was this rejected. So it was decided to revert this commit until a better solution is found.
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- Oct 03, 2011
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Marek Vasut authored
Signed-off-by:
Marek Vasut <marek.vasut@gmail.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> [scottwood@freescale.com: use chip instead of redundant priv_nand] Signed-off-by:
Scott Wood <scottwood@freescale.com>
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Kumar Gala authored
Add support for Job Queue/Ring LIODN for the RAID Engine on P5020. Each Job Queue/Ring combo needs one id assigned for a total of 4 (2 JQs/2 Rings per JQ). This just handles RAID Engine in non-DPAA mode. Signed-off-by:
Santosh Shukla <santosh.shukla@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Kumar Gala authored
Move some SoC/board specific defines out of corenet_ds.h and into the corresponding P3041DS/P4080DS/P5020.h. We moved CONFIG_MMC, CONFIG_PCIE3, & CONFIG_FSL_NGPIXIS because the P3060 SoC/reference board does not have these devices and it will share the same board code. Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Kumar Gala authored
The SoC configuration may have more ports enabled than a given board actually can utilize. Add a routinue that allows the board code to disable a port that it knows isn't being used. fm_disable_port() needs to be called before cpu_eth_init(). Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Ruchika Gupta authored
Pre u-boot Flow: 1. User loads the u-boot image in flash 2. PBL/Configuration word is used to create LAW for Flash at 0xc0000000 (Please note that ISBC expects all these addresses, images to be validated, entry point etc within 0 - 3.5G range) 3. ISBC validates the u-boot image, and passes control to u-boot at 0xcffffffc. Changes in u-boot: 1. Temporarily map CONFIG_SYS_MONITOR_BASE to the 1M CONFIG_SYS_PBI_FLASH_WINDOW in AS=1. (The CONFIG_SYS_PBI_FLASH_WINDOW is the address map for the flash created by PBL/configuration word within 0 - 3.5G memory range. The u-boot image at this address has been validated by ISBC code) 2. Remove TLB entries for 0 - 3.5G created by ISBC code 3. Remove the LAW entry for the CONFIG_SYS_PBI_FLASH_WINDOW created by PBL/configuration word after switch to AS = 1 Signed-off-by:
Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by:
Kuldip Giroh <kuldip.giroh@freescale.com> Acked-by:
Wood Scott-B07421 <B07421@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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