- Jun 22, 2007
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Heiko Schocher authored
- Show on the Status LEDs, some States of the board. - Get the MAC addresses from the EEProm - use PREBOOT - use the CF on the board. - check the U-Boot image in the Flash with a SHA1 checksum. - use dynamic TLB entries generation for the SDRAM Signed-off-by:
Heiko Schocher <hs@denx.de>
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- Jun 12, 2007
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Detlev Zundel authored
Most prominently this changes 'erase' to be non-repeatable. Signed-off-by:
Detlev Zundel <dzu@denx.de>
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Detlev Zundel authored
Signed-off-by:
Detlev Zundel <dzu@denx.de>
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- Jun 08, 2007
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Wolfgang Denk authored
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- Jun 06, 2007
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Wolfgang Denk authored
Signed-off-by:
Wolfgang Denk <wd@denx.de>
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Wolfgang Denk authored
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Wolfgang Denk authored
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Stefan Roese authored
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Stefan Roese authored
This patch adds NAND booting support for the AMCC Acadia eval board. Please make sure to configure jumper J7 to position 2-3 when booting from NOR, and to position 1-2 when booting for NAND. I also added a board command to configure the I2C bootstrap EEPROM values. Right now only 267MHz is support for booting either via NOR or NAND FLASH. Here the usage: => bootstrap 267 nor ;to configure the board for 267MHz NOR booting => bootstrap 267 nand ;to configure the board for 267MHz NNAND booting Signed-off-by:
Stefan Roese <sr@denx.de>
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- Jun 05, 2007
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Jon Loeliger authored
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Ed Swarthout authored
e600 does not have a bootpg restriction. Move the version string to beginning of image at fff00000. Resetvec.S is not needed. Update flash copy instructions. Add tftpflash env variable Signed-off-by:
Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by:
Jon Loeliger <jdl@freescale.com>
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- Jun 04, 2007
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Wolfgang Denk authored
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Benoît Monin authored
The attached patch is mainly cosmetic, allowing u-boot to display the correct bootstrap option letter according to the datasheets. The original patch was extended with 405EZ support by Stefan Roese. Signed-off-by:
Benoit Monin <bmonin@adeneo.eu> Signed-off-by:
Stefan Roese <sr@denx.de>
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- Jun 01, 2007
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Stefan Roese authored
Signed-off-by:
Stefan Roese <sr@denx.de>
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Stefan Roese authored
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Stefan Roese authored
This patch undoes the patch by Jeff Mann with commit-id ada4697d. As suggested by AMCC it is not recommended to dynamically change the EBC speed after bootup. So we undo this change to be on the safe side. Signed-off-by:
Stefan Roese <sr@denx.de>
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Stefan Roese authored
Signed-off-by:
Stefan Roese <sr@denx.de>
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Stefan Roese authored
This patch adds NAND booting support for the AMCC Bamboo eval board. Since the NAND-SPL boot image is limited to 4kbytes, this version only supports the onboard 64MBytes of DDR. The DIMM modules can't be supported, since the setup code for I2C DIMM autodetection and configuration is too big for this NAND bootloader. Signed-off-by:
Stefan Roese <sr@denx.de>
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Stefan Roese authored
The U-Boot NAND booting support is now extended to support ECC upon loading of the NAND U-Boot image. Tested on AMCC Sequoia (440EPx) and Bamboo (440EP). Signed-off-by:
Stefan Roese <sr@denx.de>
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Stefan Roese authored
This patch updates the "normal" Bamboo NOR booting port, so that it is compatible with the coming soon NAND booting Bamboo port. It also enables the 2nd NAND flash on the Bamboo. Signed-off-by:
Stefan Roese <sr@denx.de>
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Stefan Roese authored
Signed-off-by:
Stefan Roese <sr@denx.de>
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Stefan Roese authored
This patch adds hardware ECC support to the NDFC driver. It also changes the register access from using the "simple" in32/out32 functions to the in_be32/out_be32 functions, which make sure that the access is correctly synced. This is the only recommended access to SoC registers in the current Linux kernel. Signed-off-by:
Stefan Roese <sr@denx.de>
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Stefan Roese authored
This patch updates the nand_ecc code to the latest Linux version. The main reason for this is the more compact code. This makes it possible to include the ECC code into the NAND bootloader image (NAND_SPL) for PPC4xx. Signed-off-by:
Stefan Roese <sr@denx.de>
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Stefan Roese authored
Signed-off-by:
Stefan Roese <sr@denx.de>
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Stefan Roese authored
With the updated 44x DDR2 driver the Luan board now supports ECC generation and checking. Signed-off-by:
Stefan Roese <sr@denx.de>
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Stefan Roese authored
Add config option for 180 degree advance clock control as needed for the AMCC Luan eval board. Signed-off-by:
Stefan Roese <sr@denx.de>
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- May 31, 2007
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Wolfgang Denk authored
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Wolfgang Denk authored
Signed-off-by:
Wolfgang Denk <wd@denx.de>
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- May 27, 2007
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Wolfgang Denk authored
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Bartlomiej Sieka authored
Signed-off-by:
Bartlomiej Sieka <tur@semihalf.com>
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Bartlomiej Sieka authored
Enable redundant environment, add a MTD partition for it; also add env. variable command for passing MTD partitions to the kernel command line. Signed-off-by:
Piotr Kruszynski <ppk@semihalf.com> Acked-by:
Bartlomiej Sieka <tur@semihalf.com>
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Bartlomiej Sieka authored
Allow passing longer command line to the kernel - useful especially for passing MTD partition layout. Signed-off-by:
Piotr Kruszynski <ppk@semihalf.com> Acked-by:
Bartlomiej Sieka <tur@semihalf.com>
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Bartlomiej Sieka authored
Signed-off-by:
Piotr Kruszynski <ppk@semihalf.com> Acked-by:
Bartlomiej Sieka <tur@semihalf.com>
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Bartlomiej Sieka authored
Change EEPROM configuration according to the datasheet: "The 24C01A and 24C02A have a page write capability of two bytes", and "This device offers fast (1ms) byte write". Add 3ms of extra delay. Signed-off-by:
Piotr Kruszynski <ppk@semihalf.com> Acked-by:
Bartlomiej Sieka <tur@semihalf.com>
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Bartlomiej Sieka authored
After being reset in mpc5xxx_fec_init_phy(), PHY goes into FX mode, in which networking does not function. This commit switches PHY to TX mode by clearing the FX_SEL bit of Mode Control Register. It also reverses commit 008861a2, i.e., a temporary workaround. Signed-off-by:
Grzegorz Bernacki <gjb@semihalf.com> Acked-by:
Bartlomiej Sieka <tur@semihalf.com>
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Bartlomiej Sieka authored
Signed-off-by:
Piotr Kruszynski <ppk@semihalf.com> Acked-by:
Bartlomiej Sieka <tur@semihalf.com>
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Bartlomiej Sieka authored
Signed-off-by:
Jan Wrobel <wrr@semihalf.com> Acked-by:
Bartlomiej Sieka <tur@semihalf.com>
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Bartlomiej Sieka authored
Both CFG_PCISPEED_66 and CFG_IPBSPEED_133 are misnamed, as defining them does not cause PCI or IPB clocks to run at the specified speed. Instead, they configure divisors used to calculate said clocks. This patch renames the defines according to their real function. Signed-off-by:
Grzegorz Bernacki <gjb@semihalf.com> Acked-by:
Bartlomiej Sieka <tur@semihalf.com>
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Bartlomiej Sieka authored
Signed-off-by:
Jan Wrobel <wrr@semihalf.com> Signed-off-by:
Marian Balakowicz <m8@semihalf.com> Acked-by:
Bartlomiej Sieka <tur@semihalf.com>
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- May 24, 2007
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Stefan Roese authored
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