- Oct 21, 2011
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Macpaul Lin authored
This patch move the reset function from initialization to driver register procedure. Some embedded system supports wake on lan nowadays. On this kind of system, the ftgmac100 will be still supplied power after the system has been shut-down by Linux. Hence the register used by linux won't be clear when the system has been powered-off. The origin ftgmac100 driver in u-boot will only register driver and functions to network stack and won't reset the ftgmac100 hardware if the network won't be used during boot-up. This will lead ftgmac100 continue receiving packets and then might corrupt linux kernel when booting up. So we reorder the hardware reset function earlier to force the hardware to be reset whether it will be used or not. Signed-off-by:
Macpaul Lin <macpaul@andestech.com>
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- Oct 20, 2011
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Timur Tabi authored
The work-around for P4080 erratum SERDES9 says that the SERDES receiver lanes should be reset after the XAUI starts tranmitting alignment signals. Signed-off-by:
Timur Tabi <timur@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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- Oct 18, 2011
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Kumar Gala authored
The MDIO controller to talk to external PHYs is on FM1-DTSEC1 so don't allow disabling. If we disable it we end up powering the block down in the SoC and thus can't communicate to any external PHYs. Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Kumar Gala authored
FM1-DTSEC1's MAC was being marked as disabled if the port was not configured based on the SoC configuration. However we utilize the MAC interface for MDIO and thus should NOT mark it disabled. Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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- Oct 17, 2011
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Jason Jin authored
commit a45dde22 changed the dm9000 direct register access to standard IO. This should work on the ColdFire platform as there are corresponding macros for the LE devices. But the hardware settings on some ColdFire boards had swapped the byte order which make the original macros such as out_le16 cannot work. To avoid changing the common io access code on ColdFire platform, the DM9000_BYTE_SWAPPED define was added to make the dm9000 use __raw* IO access on some ColdFire boards. Signed-off-by:
Jason Jin <Jason.jin@freescale.com>
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- Oct 15, 2011
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Michal Simek authored
Add axi_ethernet driver for little-endian Microblaze. RX/TX BDs and rxframe buffer are shared among all axi_ethernet MACs. Only one MAC can work in one time. Signed-off-by:
Michal Simek <monstr@monstr.eu> Acked-by:
Mike Frysinger <vapier@gentoo.org>
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Michal Simek authored
Coding style should follow linux coding style. Signed-off-by:
Michal Simek <monstr@monstr.eu>
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Michal Simek authored
Do not setup additional ENET_MAX_MTU macro. Signed-off-by:
Michal Simek <monstr@monstr.eu>
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Michal Simek authored
Setup RX/TX ping-pong buffer for every emaclite IP separately. The next patch move initialization directly to board code. Signed-off-by:
Michal Simek <monstr@monstr.eu>
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- Oct 14, 2011
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Timur Tabi authored
Before the Teranetics TN2020 PHY can be used, the SERDES lanes need to be aligned, so wait for lane alignment before completing the startup sequence. Note that this process can take up to three seconds. Signed-off-by:
Timur Tabi <timur@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Timur Tabi authored
The EC1_EXT, EC2_EXT, and EC3 bits in the RCW don't officially exist on the P3060 and should always be set to zero. Signed-off-by:
Timur Tabi <timur@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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- Oct 09, 2011
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Timur Tabi authored
Function dtsec_configure_serdes() needs to know where the TBI PHY registers are in order to configure SGMII for proper SerDes operation. During SGMII initialzation, fm_eth_init_mac() passing NULL for 'phyregs' when it called init_dtsec(), because it was believed that phyregs was not used. In fact, it is used by dtsec_configure_serdes() to configure the TBI PHY registers. We also need to define the PHY registers in struct fm_mdio. Signed-off-by:
Timur Tabi <timur@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Andy Fleming authored
The Teranetics PHY does not properly report the link state for fiber connections. The new PHY code actually checked the link, and so the FM driver would refuse to talk over a linkless PHY. But the link may actually be up, so now we always report it as up for fiber connections on the tn2020. Signed-off-by:
Andy Fleming <afleming@freescale.com>
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Wolfgang Denk authored
Fix: smc91111.c: In function 'smc_phy_configure': smc91111.c:1194:6: warning: variable 'failed' set but not used [-Wunused-but-set-variable] smc91111.c:1190:7: warning: variable 'phyaddr' set but not used [-Wunused-but-set-variable] Signed-off-by:
Wolfgang Denk <wd@denx.de>
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Michael Walle authored
Esp. while printing the environment the output is usually longer than 512 bytes. Instead of cutting the message, send multiple 512 bytes packets. Signed-off-by:
Michael Walle <michael@walle.cc> Acked-by:
Mike Frysinger <vapier@gentoo.org>
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- Oct 05, 2011
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Mike Frysinger authored
This is long over due. All but two net drivers have been converted, but those have now been dropped. The only thing left to do is actually delete all references to NET_MULTI and code that is compiled when that is not defined. So here we scrub the core code. Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
This driver was never converted to NET_MULTI, and no board uses it. So punt it and be done. Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
These drivers have never been converted to NET_MULTI, and they are only used by one board (BMW). So drop the drivers until someone feels like rewriting them for NET_MULTI support. Rather than punting the BMW board completely, just disable net support in its board config. Seems to build fine without it. Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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- Oct 03, 2011
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Shengzhou Liu authored
Add P3060 SoC specific information:cores setup, LIODN setup, etc The P3060 SoC combines six e500mc Power Architecture processor cores with high-performance datapath acceleration architecture(DPAA), CoreNet fabric infrastructure, as well as network and peripheral interfaces. Signed-off-by:
Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Kumar Gala authored
The SoC configuration may have more ports enabled than a given board actually can utilize. Add a routinue that allows the board code to disable a port that it knows isn't being used. fm_disable_port() needs to be called before cpu_eth_init(). Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Michal Simek authored
Every emaclite instance use own setting. Signed-off-by:
Michal Simek <monstr@monstr.eu> Acked-by:
Mike Frysinger <vapier@gentoo.org>
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Michal Simek authored
Use dev->iobase instead of baseaddress. Signed-off-by:
Michal Simek <monstr@monstr.eu>
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Michal Simek authored
Simplify driver logic and clear eth_device structure in one command. Signed-off-by:
Michal Simek <monstr@monstr.eu>
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Michal Simek authored
Cleanup structure. Signed-off-by:
Michal Simek <monstr@monstr.eu>
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Michal Simek authored
Current xilinx emaclite use net multi registration but doesn't support several emaclites interfaces. Changing driver name with adding address to name is the first step how to distiguish several drivers. Signed-off-by:
Michal Simek <monstr@monstr.eu>
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- Sep 30, 2011
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Marek Vasut authored
Signed-off-by:
Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
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Marek Vasut authored
Signed-off-by:
Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
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Marek Vasut authored
Signed-off-by:
Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
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Marek Vasut authored
Signed-off-by:
Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
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Marek Vasut authored
This patch allows user to register multiple FEC controllers. To preserve compatibility with older boards, the mxcfec_register() call is still in place. To use multiple controllers, new macro is in place, the mxcfec_register_multi(), which takes more arguments. The syntax is: mxcfec_register_multi(bd, FEC ID, FEC PHY ID on the MII bus, base address); To disable the fecmxc_register() compatibility stuff, define the macro CONFIG_FEC_MXC_MULTI. This will remove the requirement for defining IMX_FEC_BASE and CONFIG_FEC_MXC_PHYADDR. Signed-off-by:
Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
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Marek Vasut authored
Signed-off-by:
Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
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Marek Vasut authored
The default is MII100, which was hardcoded previously in the driver. Signed-off-by:
Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
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Marek Vasut authored
Signed-off-by:
Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
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Marek Vasut authored
Signed-off-by:
Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
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Marek Vasut authored
Signed-off-by:
Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
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Marek Vasut authored
Signed-off-by:
Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
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Heiko Schocher authored
Once the MDIO state machine has been initialized and enabled, it starts polling all 32 PHY addresses on the MDIO bus, looking for an active PHY. Add a 5 ms delay, so all PHYs are for sure detected. This problem was detected on the cmc board with a KSZ8864 switch. Signed-off-by:
Heiko Schocher <hs@denx.de> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Heiko Schocher authored
The PHY driver was too verbose and corrupted the boot message display like this: ... Net: Ethernet PHY: KSZ8873 @ 0x02 DaVinci-EMAC ... Turn printf() into debug() so we get the expected output again: ... Net: DaVinci-EMAC ... Signed-off-by:
Heiko Schocher <hs@denx.de> cc: Paulraj Sandeep <s-paulraj@ti.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Heiko Schocher authored
Signed-off-by:
Heiko Schocher <hs@denx.de> Cc: Paulraj Sandeep <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Mike Frysinger <vapier@gentoo.org> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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Ajay Bhargav authored
This patch adds support for Fast Ethernet Controller driver for Armada100 series. Signed-off-by:
Ajay Bhargav <ajay.bhargav@einfochips.com> Signed-off-by:
Prafulla Wadaskar <prafulla@marvell.com>
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