Some board of SH does not have flash memoy.
This revises it to initialize Flash when CONFIG_SYS_NO_FLASH is not
defined.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

SH7757 has ETHER and GETHER. This patch supports EHTER only.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

The POST word is stored in a spare register in the PIC on MPC8[5/6]xx
processors.  When interrupt_init() is called, this register gets reset
which resulted in all POST_RAM POSTs not being ran due to the corrupted
POST word.  To resolve this, store off POST word before the PIC is
reset, and restore it after the PIC has been initialized.

Signed-off-by: John Schmoller <jschmoller@xes-inc.com>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

- Timeout counter value is set as DTOCV bits in SYSCTL register
  For counter value set as timeout,
  Timeout period = (2^(timeout + 13)) SD Clock cycles

- As per 4.6.2.2 section of SD Card specification v2.00, host should
  cofigure timeout period value to minimum 0.25 sec.

- Number of SD Clock cycles for 0.25sec should be minimum
	(SD Clock/sec * 0.25 sec) SD Clock cycles
	= (mmc->tran_speed * 1/4) SD Clock cycles

- Calculating timeout based on
	(2^(timeout + 13)) >=  mmc->tran_speed * 1/4
	Taking log2 both the sides and rounding up to next power of 2
	=> timeout + 13 = log2(mmc->tran_speed/4) + 1

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Acked-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Tested-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

Currently, pixis_reset altbank does not work properly. This patch
uses the correct mask to boot into the alternate bank.

Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

Copying directly from ECM/PQ3 is not correct for how CoreNet based
platforms handle boot page translation.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

This patch revised clk_adjust and wrlvl_start timings for corenet_ds, based
on testing on Virtium VL33B5163F-K9S and Kingston KVR1333D3Q8R9S/4G.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

For DDR3 controller, the clk_adjust and wrlvl_start are platform-dependent.
The best values should be picked up from the middle of all working
combinations. This patch updates the table with confirmed values tested on
Hynix dual-rank UDIMMs (HMT125U7BFR8C-H9) at 1300MT/s, 1200MT/s, 1000MT/s,
900MT/s, 800MT/s and Kingston quad-rank RDIMMs (KVR1333D3Q8R9S/4G) at 1300MT/s,
1200MT/s, 1000MT/s.

Signed-off-by: York Sun <yorksun@freescale.com>

The write recovery time of both registers should match. Since mode register
doesn't support cycles of 9,11,13,15, we should use next higher number for
both registers.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

We had an extra '0x' in the output of the LAWAR header that would cause
output like:

LAWBAR11: 0x00000000 LAWAR0x11: 0x80f0001d

intead of:

LAWBAR11: 0x00000000 LAWAR11: 0x80f0001d

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

This commit updates the mach-types based on the latest
in linus's head

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
Tested-by: Magnus Lilja <lilja.magnus@gmail.com>

get_sp() was incorrectly excluded if none of
  CONFIG_SETUP_MEMORY_TAGS
  CONFIG_CMDLINE_TAG
  CONFIG_INITRD_TAG
  CONFIG_SERIAL_TAG
  CONFIG_REVISION_TAG
were defined.

Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>

DKB is a Development Board for PANTHEON TD/TTC(pxa920/pxa910) with
* Processor upto 806Mhz
* LPDDR1/2
* x8/x16 SLC/MLC NAND
* Footprints for eMMC & MMC x8 card

With Peripherals:
* Parallel LCD I/F
* Audio codecs (88PM8607)
* MIPI CSI-2 camera
* Marvell 88W8787 802.11n/BT module
* Marvell 2G/3G RF
* Dual analog mics & speakers, headset jack, LED, ambient
* USB2.0 HS host, OTG (mini AB)
* GPIO, GPIO expander with DIP switches for easier selection
* UART serial over USB, CIR

This patch adds basic board support with DRAM and UART functionality

Signed-off-by: Lei Wen <leiwen@marvell.com>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>

This patch adds the Multiple Function Pin configuration support for
Marvell PANTHEON SoCs

Signed-off-by: Lei Wen <leiwen@marvell.com>

Signed-off-by: Lei Wen <leiwen@marvell.com>

Pantheon Family processors are highly integrated SoCs
based on Sheeva_88SV331x-v5 PJ1 cpu core.
Ref:
http://www.marvell.com/products/processors/communications/marvell_pantheon_910_920_pb.pdf



SoC versions Supported:
1) PANTHEON920          (TD)
2) PANTHEON910          (TTC)

Signed-off-by: Lei Wen <leiwen@marvell.com>

Since there are lots of difference between kirkwood and armada series,
it is better to seperate them but still keep the most common file
shared by all marvell platform in the mv-common configure file.

This patch move the kirkwood only driver definitoin in mv-common to
the <soc_name>/config.h.

This patch is tested with compilation for armada100 and guruplug.

Signed-off-by: Lei Wen <leiwen@marvell.com>

Commit 3c0659b5 "ARM: Avoid compiler optimization for readb, writeb
and friends." introduced I/O accessors with memory barriers.
Unfortunately the new write*() accessors introduced a bug:

The problem is that the argument "v" gets evaluated twice.  This
breaks code like used here (from "drivers/net/dnet.c"):

	for (i = 0; i < wrsz; i++)
		writel(*bufp++, &dnet->regs->TX_DATA_FIFO);

Use auxiliary variables to avoid such problems.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.aribaud@free.fr>
Cc: Alexander Holler <holler@ahsoftware.de>
Cc: Dirk Behme <dirk.behme@googlemail.com>

Signed-off-by: Alexander Stein <alexander.stein@informatik.tu-chemnitz.de>

Signed-off-by: Tom Warren <twarren@nvidia.com>

Signed-off-by: Tom Warren <twarren@nvidia.com>

Signed-off-by: Tom Warren <twarren@nvidia.com>

Signed-off-by: Tom Warren <twarren@nvidia.com>

Use board_early_init_f so that the full boot log output can be displayed.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

Upstream linux moved from MACH_TYPE_MX51_LANGE51 to
MACH_TYPE_MX51_EFIKAMX.

Signed-off-by: Loïc Minier <loic.minier@linaro.org>

Signed-off-by: Remy Bohmer <linux@bohmer.net>

These variables are only used in case CONFIG_SYS_NO_FLASH is NOT set:
struct mtd_device *dev;
struct part_info *part;
u8 dev_type, dev_num, pnum;

Signed-off-by: Remy Bohmer <linux@bohmer.net>

Add waiting for receiving Ethernet gadget state on the Windows host
side before dropping pullup, but keep it for debug.

Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>

Port USB gadget RNDIS protocol support from linux-2.6.26
(.27 gadget stack actually has composite drivers).

Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>

Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>

Port struct net_device_stats and statistics collecting needed for
RNDIS protocol.

Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>

Disconnecting USB gadget with pending interrupt may cause its wrong
handling in the next time when interface will be started again
(especially actual for RNDIS). This interrupt may force the gadget
to queue unexpected response before setup stage.
Despite the fact that such interrupt handled after dropped pullup
also may add pending response, this will not bring to any issues due to
usb_ep_disable (which clears the queue) called on gadget unregistering.

Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>

Driver originally written by NVIDIA Corporation, modified to
handle odd-length packets.

Signed-off-by: Simon Glass <sjg@chromium.org>

This adds support for using USB Ethernet dongles in host mode. This is just
the framework - drivers will come later. A new config option called
CONFIG_USB_HOST_ETHER can be defined in board config files to switch this
on.

The was originally written by NVIDIA and was cleaned up for release by the
Chromium authors.

Signed-off-by: Simon Glass <sjg@chromium.org>

Changed both to use a common timeout for URB submission, since they were using
different values and EHCI's was too short.

Also fixed EHCI to actually check if urb submission succeeded, rather than
silently continuing into the weeds.

Change-Id: I7f71499ffaa05187d8e5618db2419e1606007b82

Signed-off-by: Simon Glass <sjg@chromium.org>

Fix the problem which cannot build the U-boot, if we only set
the CONFIG_ENV_IS_IN_SPI_FLASH.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

Add infomation of RTL-8016AS to hw_info.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Ben Warren <biggerbadderben@gmail.com>