- May 12, 2011
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Luca Ceresoli authored
This is needed for the upcoming TFTP server implementation. This also simplifies PingHandler() and fixes rxhand_f documentation. Signed-off-by:
Luca Ceresoli <luca.ceresoli@comelit.it> Cc: Wolfgang Denk <wd@denx.de> Acked-by:
Detlev Zundel <dzu@denx.de>
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Luca Ceresoli authored
Signed-off-by:
Luca Ceresoli <luca.ceresoli@comelit.it> Cc: Wolfgang Denk <wd@denx.de> Acked-by:
Detlev Zundel <dzu@denx.de>
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Wolfgang Denk authored
Commit 9d8fbd1b "powerpc, 8xx: Fixup all 8xx u-boot.lds scripts" broke building of the MPC8260 based "hymod" board. Fix this. Signed-off-by:
Wolfgang Denk <wd@denx.de> Cc: Murray Jensen <Murray.Jensen@csiro.au> Cc: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
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Mike Frysinger authored
The previous commit imported a little too much from upstream. We need to disable stdio.h when using U-Boot. Reported-by:
Wolfgang Denk <wd@denx.de> Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Simon Guinot authored
Netconsole use the environment variable `ncip' to configure the destination IP. `serverip' don't need to be defined. Signed-off-by:
Simon Guinot <sguinot@lacie.com>
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John Rigby authored
Two new options: CONFIG_PL011_SERIAL_RLCR Some vendor versions of PL011 serial ports (e.g. ST-Ericsson U8500) have separate receive and transmit line control registers. Set this variable to initialize the extra register. CONFIG_PL011_SERIAL_FLUSH_ON_INIT On some platforms (e.g. U8500) U-Boot is loaded by a second stage boot loader that has already initialized the UART. Define this variable to flush the UART at init time. empty fifo on init Signed-off-by:
John Rigby <john.rigby@linaro.org> Signed-off-by:
Rabin Vincent <rabin.vincent@stericsson.com>
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Steven A. Falco authored
APM errata CHIP_21 for the 405EX/EXr (from the rev 1.09 document dated 4/27/11) states that rev D processors may wake up with the wrong feature set. This patch implements the APM-proposed workaround. To enable this patch for your board, add the appropriate define for your CPU to your board header file. See kilauea.h for more information. The following variants are supported: #define CONFIG_SYS_4xx_CHIP_21_405EX_NO_SECURITY #define CONFIG_SYS_4xx_CHIP_21_405EX_SECURITY #define CONFIG_SYS_4xx_CHIP_21_405EXr_NO_SECURITY #define CONFIG_SYS_4xx_CHIP_21_405EXr_SECURITY Please note that if you select the wrong define, your board will not boot, and JTAG will be required to recover. Tested on custom boards using: CONFIG_SYS_4xx_CHIP_21_405EX_NO_SECURITY <sfalco@harris.com> CONFIG_SYS_4xx_CHIP_21_405EX_SECURITY <eibach@gdsys.de> Signed-off-by:
Steve Falco <sfalco@harris.com> Acked-by:
Dirk Eibach <eibach@gdsys.de> Signed-off-by:
Stefan Roese <sr@denx.de>
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- May 11, 2011
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Clint Adams authored
Signed-off-by:
Clint Adams <clint@debian.org> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Julian Pidancet <julian.pidancet@citrix.com>
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Clint Adams authored
Though the OpenRD-Base only has one gigabit Ethernet port, both the OpenRD-Client and OpenRD-Ultimate each have two. On the Ultimate, the PHY addresses are consecutive, but on the Client they are not. (based on <62a0952ce368acc725063a00a5ec680a639d6c27.1301040318.git.julian.pidancet@citrix.com> <ad0a2dc1e422698b005d6f0ceb6dd6f75a87e00a.1301040318.git.julian.pidancet@citrix.com> ) Signed-off-by:
Clint Adams <clint@debian.org> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Julian Pidancet <julian.pidancet@citrix.com>
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Clint Adams authored
Signed-off-by:
Clint Adams <clint@debian.org> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Julian Pidancet <julian.pidancet@citrix.com>
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Clint Adams authored
Signed-off-by:
Clint Adams <clint@debian.org> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Julian Pidancet <julian.pidancet@citrix.com>
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Simon Guinot authored
The asm/arch/config.h header define CONFIG_NR_DRAM_BANKS_MAX, which is needed to configure DRAM banks. This patch move the asm/arch/config.h header inclusion above the DRAM banks configuration. Additionally this patch fix a typo. Signed-off-by:
Simon Guinot <sguinot@lacie.com>
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Simon Guinot authored
This patch allow to override CONFIG_SYS_TCLK from board configuration files. This is needed for the Network Space v2 which use a non standard core clock frequency (166MHz instead of 200MHz for a 6281 SoC). As a possible enhancement for 6281 and 6282 devices, TCLK could be dynamically detected by checking the Sample at Reset register bit 21. Additionally this patch fix a typo. Signed-off-by:
Simon Guinot <sguinot@lacie.com> Acked-by:
Prafulla Wadaskar <Prafulla@marvell.com>
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Stefano Babic authored
Drop warnings in get_cpu_rev and changes the return value (a u32 instead of char * is returned) of the function to be coherent with other processors. Signed-off-by:
Stefano Babic <sbabic@denx.de> CC: Detlev Zundel <dzu@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com>
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Stefano Babic authored
Drop warning caused by missing prototype for mxc_hw_watchdog_reset(). Signed-off-by:
Stefano Babic <sbabic@denx.de>
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Fabio Estevam authored
Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com>
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Fabio Estevam authored
Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com>
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Ben Gardiner authored
The current NAND timings, introduced in commit a3f88293 da850evm: setup the NAND flash timings , incorrectly set WSTROBE and TA to 0. A more recent inspection of the values set by the Linux kernel indicates that these should be set to 1. Set the WSTROBE and TA field of the EMIFA cycle-count timings configuration to 1 to match the values set by linux. Signed-off-by:
Ben Gardiner <bengardiner@nanometrics.ca> CC: Stefano Babic <sbabic@denx.de> CC: Sandeep Paulraj <s-paulraj@ti.com> CC: Scott Wood <scottwood@freescale.com> Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com>
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- May 10, 2011
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Valentin Longchamp authored
Collect all keymile specific common headers in include/configs/km. Signed-off-by:
Heiko Schocher <hs@denx.de> Signed-off-by:
Valentin Longchamp <valentin.longchamp@keymile.com> cc: Wolfgang Denk <wd@denx.de> cc: Detlev Zundel <dzu@denx.de> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Kim Phillips <kim.phillips@freescale.com> cc: Holger Brunck <holger.brunck@keymile.com>
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Holger Brunck authored
Signed-off-by:
Holger Brunck <holger.brunck@keymile.com> Acked-by:
Heiko Schocher <hs@denx.de> cc: Wolfgang Denk <wd@denx.de> cc: Detlev Zundel <dzu@denx.de> cc: Valentin Longchamp <valentin.longchamp@keymile.com> Signed-off-by:
Valentin Longchamp <valentin.longchamp@keymile.com>
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Holger Brunck authored
Read out board id and HW key from the IVM eeprom and set these values as an environment variable. Signed-off-by:
Holger Brunck <holger.brunck@keymile.com> Acked-by:
Heiko Schocher <hs@denx.de> cc: Wolfgang Denk <wd@denx.de> cc: Detlev Zundel <dzu@denx.de> cc: Valentin Longchamp <valentin.longchamp@keymile.com>
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Holger Brunck authored
Signed-off-by:
Holger Brunck <holger.brunck@keymile.com> Acked-by:
Heiko Schocher <hs@denx.de> cc: Wolfgang Denk <wd@denx.de> cc: Detlev Zundel <dzu@denx.de> cc: Valentin Longchamp <valentin.longchamp@keymile.com> Signed-off-by:
Valentin Longchamp <valentin.longchamp@keymile.com>
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Thomas Herzmann authored
The initial_boot_bank can be set when more than one application is used in a bootpackage. But a value n <> 0 never led to booting from bank n. Instead, bank 0 was booted. This patch fixes this. Signed-off-by:
Thomas Herzmann <thomas.herzmann@keymile.com> Signed-off-by:
Holger Brunck <holger.brunck@keymile.com> Acked-by:
Heiko Schocher <hs@denx.de> cc: Wolfgang Denk <wd@denx.de> cc: Detlev Zundel <dzu@denx.de> cc: Valentin Longchamp <valentin.longchamp@keymile.com> Signed-off-by:
Valentin Longchamp <valentin.longchamp@keymile.com>
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Holger Brunck authored
commit 91a3c14c (ppc, mgcoge: add DIP switch detection) introduces an compile error due to an missing define in the mgcoge2ne.h. DIP switch detection is valid for both boards. Signed-off-by:
Holger Brunck <holger.brunck@keymile.com> cc: Wolfgang Denk <wd@denx.de> cc: Heiko Schocher <hs@denx.de>
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Holger Brunck authored
On mgcoge3ne a new environment variable bobcatreset is used. So this patch adds a possibility to add board specific environment variables in general and this specific variable for mgcoge3ne. Signed-off-by:
Holger Brunck <holger.brunck@keymile.com> Acked-by:
Heiko Schocher <hs@denx.de> cc: Wolfgang Denk <wd@denx.de> cc: Detlev Zundel <dzu@denx.de> cc: Valentin Longchamp <valentin.longchamp@keymile.com> Signed-off-by:
Valentin Longchamp <valentin.longchamp@keymile.com>
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Holger Brunck authored
Reserved bit was changed according to the processors manual. Signed-off-by:
Holger Brunck <holger.brunck@keymile.com> Acked-by:
Heiko Schocher <hs@denx.de> cc: Wolfgang Denk <wd@denx.de> cc: Detlev Zundel <dzu@denx.de> cc: Valentin Longchamp <valentin.longchamp@keymile.com> Signed-off-by:
Valentin Longchamp <valentin.longchamp@keymile.com>
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Holger Brunck authored
This patch adds support for the MPC8247 based board mgcoge3ne. Additionaly mgcoge2ne board supprot was removed, because due to the mgcoge3ne, this board is obsolete and not longer maintained. The board is similar to mgcoge. The difference is that a NUMONYX flash is used and a different SDRAM (256MB). Also introduce CONFIG_KM_82XX to collect ppc82xx common settings and remove staticness from the common set_pin function. Signed-off-by:
Holger Brunck <holger.brunck@keymile.com> Signed-off-by:
Valentin Longchamp <valentin.longchamp@keymile.com> Acked-by:
Heiko Schocher <hs@denx.de> cc: Wolfgang Denk <wd@denx.de> cc: Detlev Zundel <dzu@denx.de>
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Huber, Andreas authored
Introduce a struct for the BFTICU FPGA to increase the readability of the code. And the define CONFIG_SYS_BFTICU_BASE was removed because the CONFIG_SYS_FPGA_BASE is already the base value for BFTICU registers. Signed-off-by:
Andreas Huber <andreas.huber@keymile.com> Signed-off-by:
Holger Brunck <holger.brunck@keymile.com> Signed-off-by:
Valentin Longchamp <valentin.longchamp@keymile.com> Acked-by:
Heiko Schocher <hs@denx.de> cc: Wolfgang Denk <wd@denx.de> cc: Detlev Zundel <dzu@denx.de>
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Holger Brunck authored
The directory and file mgcoge was renamed to km82xx. Because other keymile 82xx will follow and will use the same platform code. Signed-off-by:
Holger Brunck <holger.brunck@keymile.com> Acked-by:
Heiko Schocher <hs@denx.de> cc: Wolfgang Denk <wd@denx.de> cc: Detlev Zundel <dzu@denx.de> cc: Valentin Longchamp <valentin.longchamp@keymile.com> Signed-off-by:
Valentin Longchamp <valentin.longchamp@keymile.com>
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Holger Brunck authored
Signed-off-by:
Holger Brunck <holger.brunck@keymile.com> Acked-by:
Heiko Schocher <hs@denx.de> cc: Wolfgang Denk <wd@denx.de> cc: Detlev Zundel <dzu@denx.de> cc: Valentin Longchamp <valentin.longchamp@keymile.com> Signed-off-by:
Valentin Longchamp <valentin.longchamp@keymile.com>
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Holger Brunck authored
The hdlc implementation for mgcoge was initially developed, but later on not used. Remove the C files, the references in mgcoge.c and the Makefile to decrease maintenance effort. Signed-off-by:
Holger Brunck <holger.brunck@keymile.com> Acked-by:
Heiko Schocher <hs@denx.de> cc: Wolfgang Denk <wd@denx.de> cc: Detlev Zundel <dzu@denx.de> cc: Valentin Longchamp <valentin.longchamp@keymile.com> Signed-off-by:
Valentin Longchamp <valentin.longchamp@keymile.com>
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Heiko Schocher authored
cc: Wolfgang Denk <wd@denx.de> cc: Detlev Zundel <dzu@denx.de> cc: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Holger Brunck <holger.brunck@keymile.com> Signed-off-by:
Valentin Longchamp <valentin.longchamp@keymile.com>
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Heiko Schocher authored
do not define own flash_info variable, instead use the flash_info variable defined in your flash driver. Signed-off-by:
Heiko Schocher <hs@denx.de> cc: Wolfgang Denk <wd@denx.de> cc: Detlev Zundel <dzu@denx.de> cc: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Holger Brunck <holger.brunck@keymile.com> Signed-off-by:
Valentin Longchamp <valentin.longchamp@keymile.com>
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- May 09, 2011
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Shinya Kuribayashi authored
Current timer routines (arch/mips/lib/timer.c) are implemented assuming that MIPS32 coprocessor (CP0) resources, Counter and Compare registers in this case, are available. But this doesn't always work. We need to make sure that all MIPS-based systems don't necessarily use CP0 counter/compare registers as time keeping resources. And some MIPS variant processors might come with different hardware specs with genuine MIPS32 CP0 registers. With this change, each $(CPU)/ directory can have its own timer code. Signed-off-by:
Shinya Kuribayashi <skuribay@pobox.com>
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Daniel Schwierzeck authored
All architectures but MIPS are using --gc-sections on final linking. This patch introduces that feature for MIPS to reduce the memory and flash footprint. Signed-off-by:
Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Thomas Lange <thomas@corelatus.se> Cc: Vlad Lungu <vlad.lungu@windriver.com> Signed-off-by:
Shinya Kuribayashi <skuribay@pobox.com>
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- May 06, 2011
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Shinya Kuribayashi authored
Fix style issues and alignments globally. No logical changes. - Replace C comments with AS line comments where possible - Use ifndef where possible, rather than if !defined for simplicity - An instruction executed in a delay slot is now indicated by a leading space, not by C comment Signed-off-by:
Shinya Kuribayashi <skuribay@pobox.com>
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