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Commit c657d898 authored by Kumar Gala's avatar Kumar Gala
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powerpc/85xx: Specify CONFIG_SYS_FM_MURAM_SIZE


CONFIG_SYS_FM_MURAM_SIZE varies from SoC to SoC to specify it in
config_mpc85xx.h for those parts with a Frame Manager.

Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
parent 7d640e9b
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...@@ -166,6 +166,7 @@ ...@@ -166,6 +166,7 @@
#define CONFIG_NUM_DDR_CONTROLLERS 1 #define CONFIG_NUM_DDR_CONTROLLERS 1
#define CONFIG_SYS_QMAN_NUM_PORTALS 3 #define CONFIG_SYS_QMAN_NUM_PORTALS 3
#define CONFIG_SYS_BMAN_NUM_PORTALS 3 #define CONFIG_SYS_BMAN_NUM_PORTALS 3
#define CONFIG_SYS_FM_MURAM_SIZE 0x10000
#elif defined(CONFIG_P1020) #elif defined(CONFIG_P1020)
#define CONFIG_MAX_CPUS 2 #define CONFIG_MAX_CPUS 2
...@@ -203,6 +204,7 @@ ...@@ -203,6 +204,7 @@
#define CONFIG_NUM_DDR_CONTROLLERS 1 #define CONFIG_NUM_DDR_CONTROLLERS 1
#define CONFIG_SYS_QMAN_NUM_PORTALS 3 #define CONFIG_SYS_QMAN_NUM_PORTALS 3
#define CONFIG_SYS_BMAN_NUM_PORTALS 3 #define CONFIG_SYS_BMAN_NUM_PORTALS 3
#define CONFIG_SYS_FM_MURAM_SIZE 0x10000
/* P1024 is lower end variant of P1020 */ /* P1024 is lower end variant of P1020 */
#elif defined(CONFIG_P1024) #elif defined(CONFIG_P1024)
...@@ -246,6 +248,7 @@ ...@@ -246,6 +248,7 @@
#define CONFIG_SYS_NUM_FMAN 1 #define CONFIG_SYS_NUM_FMAN 1
#define CONFIG_SYS_NUM_FM1_DTSEC 5 #define CONFIG_SYS_NUM_FM1_DTSEC 5
#define CONFIG_NUM_DDR_CONTROLLERS 1 #define CONFIG_NUM_DDR_CONTROLLERS 1
#define CONFIG_SYS_FM_MURAM_SIZE 0x28000
#elif defined(CONFIG_PPC_P3041) #elif defined(CONFIG_PPC_P3041)
#define CONFIG_MAX_CPUS 4 #define CONFIG_MAX_CPUS 4
...@@ -255,11 +258,13 @@ ...@@ -255,11 +258,13 @@
#define CONFIG_SYS_NUM_FM1_DTSEC 5 #define CONFIG_SYS_NUM_FM1_DTSEC 5
#define CONFIG_SYS_NUM_FM1_10GEC 1 #define CONFIG_SYS_NUM_FM1_10GEC 1
#define CONFIG_NUM_DDR_CONTROLLERS 1 #define CONFIG_NUM_DDR_CONTROLLERS 1
#define CONFIG_SYS_FM_MURAM_SIZE 0x28000
#elif defined(CONFIG_PPC_P4040) #elif defined(CONFIG_PPC_P4040)
#define CONFIG_MAX_CPUS 4 #define CONFIG_MAX_CPUS 4
#define CONFIG_SYS_FSL_NUM_LAWS 32 #define CONFIG_SYS_FSL_NUM_LAWS 32
#define CONFIG_SYS_FSL_SEC_COMPAT 4 #define CONFIG_SYS_FSL_SEC_COMPAT 4
#define CONFIG_SYS_FM_MURAM_SIZE 0x28000
#elif defined(CONFIG_PPC_P4080) #elif defined(CONFIG_PPC_P4080)
#define CONFIG_MAX_CPUS 8 #define CONFIG_MAX_CPUS 8
...@@ -271,6 +276,7 @@ ...@@ -271,6 +276,7 @@
#define CONFIG_SYS_NUM_FM1_10GEC 1 #define CONFIG_SYS_NUM_FM1_10GEC 1
#define CONFIG_SYS_NUM_FM2_10GEC 1 #define CONFIG_SYS_NUM_FM2_10GEC 1
#define CONFIG_NUM_DDR_CONTROLLERS 2 #define CONFIG_NUM_DDR_CONTROLLERS 2
#define CONFIG_SYS_FM_MURAM_SIZE 0x28000
#define CONFIG_SYS_FSL_ERRATUM_CPC_A002 #define CONFIG_SYS_FSL_ERRATUM_CPC_A002
#define CONFIG_SYS_FSL_ERRATUM_CPC_A003 #define CONFIG_SYS_FSL_ERRATUM_CPC_A003
#define CONFIG_SYS_FSL_ERRATUM_DDR_A003 #define CONFIG_SYS_FSL_ERRATUM_DDR_A003
...@@ -290,6 +296,7 @@ ...@@ -290,6 +296,7 @@
#define CONFIG_SYS_NUM_FM1_DTSEC 5 #define CONFIG_SYS_NUM_FM1_DTSEC 5
#define CONFIG_SYS_NUM_FM1_10GEC 1 #define CONFIG_SYS_NUM_FM1_10GEC 1
#define CONFIG_NUM_DDR_CONTROLLERS 1 #define CONFIG_NUM_DDR_CONTROLLERS 1
#define CONFIG_SYS_FM_MURAM_SIZE 0x28000
#elif defined(CONFIG_PPC_P5020) #elif defined(CONFIG_PPC_P5020)
#define CONFIG_MAX_CPUS 2 #define CONFIG_MAX_CPUS 2
...@@ -299,6 +306,7 @@ ...@@ -299,6 +306,7 @@
#define CONFIG_SYS_NUM_FM1_DTSEC 5 #define CONFIG_SYS_NUM_FM1_DTSEC 5
#define CONFIG_SYS_NUM_FM1_10GEC 1 #define CONFIG_SYS_NUM_FM1_10GEC 1
#define CONFIG_NUM_DDR_CONTROLLERS 2 #define CONFIG_NUM_DDR_CONTROLLERS 2
#define CONFIG_SYS_FM_MURAM_SIZE 0x28000
#else #else
#error Processor type not defined for this platform #error Processor type not defined for this platform
......
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