Update AR405 board.

board/esd/ar405/Makefile

@@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
 
 LIB	= lib$(BOARD).a
 
-OBJS	= $(BOARD).o flash.o
+OBJS	= $(BOARD).o flash.o ../common/misc.o
 
 $(LIB):	$(OBJS) $(SOBJS)
 	$(AR) crv $@ $(OBJS)

board/esd/ar405/ar405.c

 /*
- * (C) Copyright 2001
+ * (C) Copyright 2001-2004
  * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
  *
  * See file CREDITS for list of people who contributed to this
@@ -28,6 +28,7 @@
 
 /*cmd_boot.c*/
 extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+extern void lxt971_no_sleep(void);
 
 /* ------------------------------------------------------------------------- */
 
@@ -40,6 +41,10 @@ const unsigned char fpgadata[] = {
 #include "fpgadata.c"
 };
 
+const unsigned char fpgadata_xl30[] = {
+#include "fpgadata_xl30.c"
+};
+
 /*
  * include common fpga code (for esd boards)
  */
@@ -64,45 +69,52 @@ int board_early_init_f (void)
 	/*
 	 * Boot onboard FPGA
 	 */
+	/* first try 40er image */
+	gd->board_type = 40;
 	status = fpga_boot ((unsigned char *) fpgadata, sizeof (fpgadata));
 	if (status != 0) {
-		/* booting FPGA failed */
+		/* try xl30er image */
+		gd->board_type = 30;
+		status = fpga_boot ((unsigned char *) fpgadata_xl30, sizeof (fpgadata_xl30));
+		if (status != 0) {
+			/* booting FPGA failed */
 #ifndef FPGA_DEBUG
-		/* set up serial port with default baudrate */
-		(void) get_clocks ();
-		gd->baudrate = CONFIG_BAUDRATE;
-		serial_init ();
-		console_init_f ();
+			/* set up serial port with default baudrate */
+			(void) get_clocks ();
+			gd->baudrate = CONFIG_BAUDRATE;
+			serial_init ();
+			console_init_f ();
 #endif
-		printf ("\nFPGA: Booting failed ");
-		switch (status) {
-		case ERROR_FPGA_PRG_INIT_LOW:
-			printf ("(Timeout: INIT not low after asserting PROGRAM*)\n ");
-			break;
-		case ERROR_FPGA_PRG_INIT_HIGH:
-			printf ("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
-			break;
-		case ERROR_FPGA_PRG_DONE:
-			printf ("(Timeout: DONE not high after programming FPGA)\n ");
-			break;
-		}
-
-		/* display infos on fpgaimage */
-		index = 15;
-		for (i = 0; i < 4; i++) {
-			len = fpgadata[index];
-			printf ("FPGA: %s\n", &(fpgadata[index + 1]));
-			index += len + 3;
-		}
-		putc ('\n');
-		/* delayed reboot */
-		for (i = 20; i > 0; i--) {
-			printf ("Rebooting in %2d seconds \r", i);
-			for (index = 0; index < 1000; index++)
-				udelay (1000);
+			printf ("\nFPGA: Booting failed ");
+			switch (status) {
+			case ERROR_FPGA_PRG_INIT_LOW:
+				printf ("(Timeout: INIT not low after asserting PROGRAM*)\n ");
+				break;
+			case ERROR_FPGA_PRG_INIT_HIGH:
+				printf ("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
+				break;
+			case ERROR_FPGA_PRG_DONE:
+				printf ("(Timeout: DONE not high after programming FPGA)\n ");
+				break;
+			}
+
+			/* display infos on fpgaimage */
+			index = 15;
+			for (i = 0; i < 4; i++) {
+				len = fpgadata[index];
+				printf ("FPGA: %s\n", &(fpgadata[index + 1]));
+				index += len + 3;
+			}
+			putc ('\n');
+			/* delayed reboot */
+			for (i = 20; i > 0; i--) {
+				printf ("Rebooting in %2d seconds \r", i);
+				for (index = 0; index < 1000; index++)
+					udelay (1000);
+			}
+			putc ('\n');
+			do_reset (NULL, 0, 0, NULL);
 		}
-		putc ('\n');
-		do_reset (NULL, 0, 0, NULL);
 	}
 
 	/*
@@ -139,32 +151,44 @@ int board_early_init_f (void)
 
 int checkboard (void)
 {
+	DECLARE_GLOBAL_DATA_PTR;
+
 	int index;
 	int len;
 	unsigned char str[64];
 	int i = getenv_r ("serial#", str, sizeof (str));
+	const unsigned char *fpga;
 
 	puts ("Board: ");
 
-	if (!i || strncmp (str, "AR405", 5)) {
-		puts ("### No HW ID - assuming AR405\n");
-		return (0);
+	if (i == -1) {
+		puts ("### No HW ID - assuming AR405");
+	} else {
+		puts(str);
 	}
 
-	puts (str);
-
 	puts ("\nFPGA:  ");
 
 	/* display infos on fpgaimage */
+	if (gd->board_type == 30) {
+		fpga = fpgadata_xl30;
+	} else {
+		fpga = fpgadata;
+	}
 	index = 15;
 	for (i = 0; i < 4; i++) {
-		len = fpgadata[index];
-		printf ("%s ", &(fpgadata[index + 1]));
+		len = fpga[index];
+		printf ("%s ", &(fpga[index + 1]));
 		index += len + 3;
 	}
 
 	putc ('\n');
 
+	/*
+	 * Disable sleep mode in LXT971
+	 */
+	lxt971_no_sleep();
+
 	return 0;
 }
 

board/esd/ar405/config.mk

@@ -26,4 +26,5 @@
 #
 
 #TEXT_BASE = 0xFFFE0000
-TEXT_BASE = 0xFFFD0000
+#TEXT_BASE = 0xFFFD0000
+TEXT_BASE = 0xFFFC0000

board/esd/ar405/flash.c

@@ -33,18 +33,19 @@
 /*-----------------------------------------------------------------------
  * Functions
  */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static void flash_get_offsets (ulong base, flash_info_t *info);
+static ulong flash_get_size (vu_long * addr, flash_info_t * info);
+static void flash_get_offsets (ulong base, flash_info_t * info);
 
 /*-----------------------------------------------------------------------
  */
 
 unsigned long flash_init (void)
 {
-	unsigned long size_b0, size_b1;
+	unsigned long size_b0;
 	int i;
 	uint pbcr;
-	unsigned long base_b0, base_b1;
+	unsigned long base_b0;
+	int size_val = 0;
 
 	/* Init: no FLASHes known */
 	for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
@@ -53,74 +54,48 @@ unsigned long flash_init (void)
 
 	/* Static FLASH Bank configuration here - FIXME XXX */
 
-	base_b0 = FLASH_BASE0_PRELIM;
-	size_b0 = flash_get_size((vu_long *)base_b0, &flash_info[0]);
+	size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
 
 	if (flash_info[0].flash_id == FLASH_UNKNOWN) {
 		printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
 			size_b0, size_b0<<20);
 	}
 
-	base_b1 = FLASH_BASE1_PRELIM;
-	size_b1 = flash_get_size((vu_long *)base_b1, &flash_info[1]);
+	/* Setup offsets */
+	flash_get_offsets (-size_b0, &flash_info[0]);
 
 	/* Re-do sizing to get full correct info */
+	mtdcr(ebccfga, pb0cr);
+	pbcr = mfdcr(ebccfgd);
+	mtdcr(ebccfga, pb0cr);
+	base_b0 = -size_b0;
+	switch (size_b0) {
+	case 1 << 20:
+		size_val = 0;
+		break;
+	case 2 << 20:
+		size_val = 1;
+		break;
+	case 4 << 20:
+		size_val = 2;
+		break;
+	case 8 << 20:
+		size_val = 3;
+		break;
+	case 16 << 20:
+		size_val = 4;
+		break;
+	}
+	pbcr = (pbcr & 0x0001ffff) | base_b0 | (size_val << 17);
+	mtdcr(ebccfgd, pbcr);
 
-	if (size_b1)
-	  {
-	    mtdcr(ebccfga, pb0cr);
-	    pbcr = mfdcr(ebccfgd);
-	    mtdcr(ebccfga, pb0cr);
-	    base_b1 = -size_b1;
-	    pbcr = (pbcr & 0x0001ffff) | base_b1 | (((size_b1/1024/1024)-1)<<17);
-	    mtdcr(ebccfgd, pbcr);
-	    /*          printf("pb1cr = %x\n", pbcr); */
-	  }
-
-	if (size_b0)
-	  {
-	    mtdcr(ebccfga, pb1cr);
-	    pbcr = mfdcr(ebccfgd);
-	    mtdcr(ebccfga, pb1cr);
-	    base_b0 = base_b1 - size_b0;
-	    pbcr = (pbcr & 0x0001ffff) | base_b0 | (((size_b0/1024/1024)-1)<<17);
-	    mtdcr(ebccfgd, pbcr);
-	    /*            printf("pb0cr = %x\n", pbcr); */
-	  }
-
-	size_b0 = flash_get_size((vu_long *)base_b0, &flash_info[0]);
-
-	flash_get_offsets (base_b0, &flash_info[0]);
-
-	/* monitor protection ON by default */
+	/* Monitor protection ON by default */
 	(void)flash_protect(FLAG_PROTECT_SET,
-			    base_b0+size_b0-monitor_flash_len,
-			    base_b0+size_b0-1,
+			    -CFG_MONITOR_LEN,
+			    0xffffffff,
 			    &flash_info[0]);
 
-	if (size_b1) {
-		/* Re-do sizing to get full correct info */
-		size_b1 = flash_get_size((vu_long *)base_b1, &flash_info[1]);
-
-		flash_get_offsets (base_b1, &flash_info[1]);
-
-		/* monitor protection ON by default */
-		(void)flash_protect(FLAG_PROTECT_SET,
-				    base_b1+size_b1-monitor_flash_len,
-				    base_b1+size_b1-1,
-				    &flash_info[1]);
-		/* monitor protection OFF by default (one is enough) */
-		(void)flash_protect(FLAG_PROTECT_CLEAR,
-				    base_b0+size_b0-monitor_flash_len,
-				    base_b0+size_b0-1,
-				    &flash_info[0]);
-	} else {
-		flash_info[1].flash_id = FLASH_UNKNOWN;
-		flash_info[1].sector_count = -1;
-	}
-
 	flash_info[0].size = size_b0;
-	flash_info[1].size = size_b1;
 
-	return (size_b0 + size_b1);
+	return (size_b0);
 }

include/configs/AR405.h

 /*
- * (C) Copyright 2001
+ * (C) Copyright 2001-2004
  * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
  *
  * See file CREDITS for list of people who contributed to this
@@ -41,6 +41,8 @@
 
 #define CONFIG_SYS_CLK_FREQ	33000000 /* external frequency to pll	*/
 
+#define CONFIG_BOARD_TYPES	1	/* support board types		*/
+
 #define CONFIG_BAUDRATE		9600
 #define CONFIG_BOOTDELAY	3	/* autoboot after 3 seconds	*/
 
@@ -60,16 +62,23 @@
 
 #endif
 
+#define CONFIG_PREBOOT                  /* enable preboot variable      */
+
 #define CONFIG_LOADS_ECHO	1	/* echo on for serial download	*/
 #define CFG_LOADS_BAUD_CHANGE	1	/* allow baudrate change	*/
 
 #define CONFIG_MII		1	/* MII PHY management		*/
 #define CONFIG_PHY_ADDR		0	/* PHY address			*/
+#define CONFIG_LXT971_NO_SLEEP  1       /* disable sleep mode in LXT971 */
 
 #define CONFIG_COMMANDS	      ( CONFIG_CMD_DFL	| \
+				CFG_CMD_DHCP	| \
 				CFG_CMD_PCI	| \
 				CFG_CMD_IRQ	| \
-				CFG_CMD_ELF	)
+				CFG_CMD_ELF	| \
+				CFG_CMD_MII	| \
+				CFG_CMD_PING	| \
+				CFG_CMD_BSP	)
 
 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
 #include <cmd_confdefs.h>
@@ -92,8 +101,12 @@
 #define CFG_MAXARGS	16		/* max number of command args	*/
 #define CFG_BARGSIZE	CFG_CBSIZE	/* Boot Argument Buffer Size	*/
 
+#define CFG_DEVICE_NULLDEV	1	/* include nulldev device	*/
+
 #define CFG_CONSOLE_INFO_QUIET	1	/* don't print console @ startup*/
 
+#define CONFIG_AUTO_COMPLETE	1       /* add autocompletion support   */
+
 #define CFG_MEMTEST_START	0x0400000	/* memtest works on	*/
 #define CFG_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/
 
@@ -143,9 +156,9 @@
  * Please note that CFG_SDRAM_BASE _must_ start at 0
  */
 #define CFG_SDRAM_BASE		0x00000000
-#define CFG_FLASH_BASE		0xFFFD0000
+#define CFG_FLASH_BASE		0xFFFC0000
 #define CFG_MONITOR_BASE	CFG_FLASH_BASE
-#define CFG_MONITOR_LEN		(192 * 1024)	/* Reserve 196 kB for Monitor	*/
+#define CFG_MONITOR_LEN		(256 * 1024)	/* Reserve 256 kB for Monitor	*/
 #define CFG_MALLOC_LEN		(128 * 1024)	/* Reserve 128 kB for malloc()	*/
 
 /*
@@ -157,7 +170,7 @@
 /*-----------------------------------------------------------------------
  * FLASH organization
  */
-#define CFG_MAX_FLASH_BANKS	2	/* max number of memory banks		*/
+#define CFG_MAX_FLASH_BANKS	1	/* max number of memory banks		*/
 #define CFG_MAX_FLASH_SECT	256	/* max number of sectors on one chip	*/
 
 #define CFG_FLASH_ERASE_TOUT	120000	/* Timeout for Flash Erase (in ms)	*/
@@ -185,7 +198,8 @@
 /*-----------------------------------------------------------------------
  * Cache Configuration
  */
-#define CFG_DCACHE_SIZE		8192	/* For IBM 405 CPUs			*/
+#define CFG_DCACHE_SIZE		16384	/* For IBM 405 CPUs, older 405 ppc's	*/
+					/* have only 8kB, 16kB is save here	*/
 #define CFG_CACHELINE_SIZE	32	/* ...			*/
 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
 #define CFG_CACHELINE_SHIFT	5	/* log base 2 of the above value	*/
@@ -197,8 +211,7 @@
  * BR0/1 and OR0/1 (FLASH)
  */
 
-#define FLASH_BASE0_PRELIM	0xFF800000	/* FLASH bank #0	*/
-#define FLASH_BASE1_PRELIM	0xFFC00000	/* FLASH bank #1	*/
+#define FLASH_BASE0_PRELIM	0xFFC00000	/* FLASH bank #0	*/
 
 /*-----------------------------------------------------------------------
  * External Bus Controller (EBC) Setup