Commit 88b0e88d authored 16 years ago by Wolfgang Grandegger Committed by Andy Fleming 16 years ago

MPC85xx: TQM8548: fix SDRAM timing for 533 MHz


According to new TQM8548 timing specification:
Refresh Recovery: 34 -> 53 clocks
CKE pulse width:  1 -> 3 cycles
Window for four activities: 13 -> 14 cycles

Signed-off-by: Jens Gehrlein <sew_s@tqs.de>
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>

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