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vesta
u-boot-2015.04
Commits
2e26d837
Commit
2e26d837
authored
16 years ago
by
Jason Jin
Committed by
Wolfgang Denk
16 years ago
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Enabled the Freescale SGMII riser card on 8536DS
Signed-off-by:
Jason Jin
<
Jason.jin@freescale.com
>
parent
7e183cad
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board/freescale/mpc8536ds/mpc8536ds.c
+42
-0
42 additions, 0 deletions
board/freescale/mpc8536ds/mpc8536ds.c
include/configs/MPC8536DS.h
+3
-0
3 additions, 0 deletions
include/configs/MPC8536DS.h
with
45 additions
and
0 deletions
board/freescale/mpc8536ds/mpc8536ds.c
+
42
−
0
View file @
2e26d837
...
...
@@ -35,8 +35,11 @@
#include
<libfdt.h>
#include
<spd_sdram.h>
#include
<fdt_support.h>
#include
<tsec.h>
#include
<netdev.h>
#include
"../common/pixis.h"
#include
"../common/sgmii_riser.h"
#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
extern
void
ddr_enable_ecc
(
unsigned
int
dram_size
);
...
...
@@ -618,6 +621,45 @@ int is_sata_supported(void)
return
1
;
}
int
board_eth_init
(
bd_t
*
bis
)
{
#ifdef CONFIG_TSEC_ENET
struct
tsec_info_struct
tsec_info
[
2
];
volatile
ccsr_gur_t
*
gur
=
(
void
*
)(
CONFIG_SYS_MPC85xx_GUTS_ADDR
);
int
num
=
0
;
uint
sdrs2_io_sel
=
(
gur
->
pordevsr
&
MPC85xx_PORDEVSR_SRDS2_IO_SEL
)
>>
27
;
#ifdef CONFIG_TSEC1
SET_STD_TSEC_INFO
(
tsec_info
[
num
],
1
);
if
((
sdrs2_io_sel
==
4
)
||
(
sdrs2_io_sel
==
6
))
{
tsec_info
[
num
].
phyaddr
=
0
;
tsec_info
[
num
].
flags
|=
TSEC_SGMII
;
}
num
++
;
#endif
#ifdef CONFIG_TSEC3
SET_STD_TSEC_INFO
(
tsec_info
[
num
],
3
);
if
(
sdrs2_io_sel
==
4
)
{
tsec_info
[
num
].
phyaddr
=
1
;
tsec_info
[
num
].
flags
|=
TSEC_SGMII
;
}
num
++
;
#endif
if
(
!
num
)
{
printf
(
"No TSECs initialized
\n
"
);
return
0
;
}
if
((
sdrs2_io_sel
==
4
)
||
(
sdrs2_io_sel
==
6
))
fsl_sgmii_riser_init
(
tsec_info
,
num
);
tsec_eth_init
(
bis
,
tsec_info
,
num
);
#endif
return
pci_eth_init
(
bis
);
}
#if defined(CONFIG_OF_BOARD_SETUP)
void
ft_board_setup
(
void
*
blob
,
bd_t
*
bd
)
...
...
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include/configs/MPC8536DS.h
+
3
−
0
View file @
2e26d837
...
...
@@ -427,6 +427,9 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
#define CONFIG_TSEC3 1
#define CONFIG_TSEC3_NAME "eTSEC3"
#define CONFIG_FSL_SGMII_RISER 1
#define SGMII_RISER_PHY_OFFSET 0x1c
#define TSEC1_PHY_ADDR 1
/* TSEC1 -> PHY1 */
#define TSEC3_PHY_ADDR 0
/* TSEC3 -> PHY0 */
...
...
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