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    d414aae5
    OMAP3: Fix SDRC init · d414aae5
    Nishanth Menon authored
    
    Defaults are for Infineon DDR timings.
    Since none of the supported boards currently do
    XIP boot, these seem to be faulty. fix the values
    as per the calculations(ACTIMA,B), conf
    the sdrc power with pwdnen and wakeupproc bits
    
    Signed-off-by: default avatarNishanth Menon <nm@ti.com>
    d414aae5
    History
    OMAP3: Fix SDRC init
    Nishanth Menon authored
    
    Defaults are for Infineon DDR timings.
    Since none of the supported boards currently do
    XIP boot, these seem to be faulty. fix the values
    as per the calculations(ACTIMA,B), conf
    the sdrc power with pwdnen and wakeupproc bits
    
    Signed-off-by: default avatarNishanth Menon <nm@ti.com>
mem.c 8.01 KiB