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Fadecandy
Commits
6652be79
Commit
6652be79
authored
11 years ago
by
Micah Elizabeth Scott
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Halfword memory accesses
parent
12cb85ef
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3 changed files
testjig/production/arm_debug.cpp
+36
-0
36 additions, 0 deletions
testjig/production/arm_debug.cpp
testjig/production/arm_debug.h
+4
-0
4 additions, 0 deletions
testjig/production/arm_debug.h
testjig/production/arm_kinetis_debug.cpp
+21
-2
21 additions, 2 deletions
testjig/production/arm_kinetis_debug.cpp
with
61 additions
and
2 deletions
testjig/production/arm_debug.cpp
+
36
−
0
View file @
6652be79
...
...
@@ -296,6 +296,42 @@ bool ARMDebug::memLoadByte(uint32_t addr, uint8_t &data)
return
true
;
}
bool
ARMDebug
::
memStoreHalf
(
uint32_t
addr
,
uint16_t
data
)
{
if
(
!
memWait
())
return
false
;
if
(
!
memWriteCSW
(
CSW_16BIT
))
return
false
;
if
(
!
apWrite
(
MEM_TAR
,
addr
))
return
false
;
log
(
LOG_TRACE_MEM
,
"MEM Store [%08x] %04x"
,
addr
,
data
);
// Replicate across lanes
uint32_t
word
=
data
|
(
data
<<
16
);
return
apWrite
(
MEM_DRW
,
word
);
}
bool
ARMDebug
::
memLoadHalf
(
uint32_t
addr
,
uint16_t
&
data
)
{
uint32_t
word
;
if
(
!
memWait
())
return
false
;
if
(
!
memWriteCSW
(
CSW_16BIT
))
return
false
;
if
(
!
apWrite
(
MEM_TAR
,
addr
))
return
false
;
if
(
!
apRead
(
MEM_DRW
,
word
))
return
false
;
// Select the proper lane
data
=
word
>>
((
addr
&
2
)
<<
3
);
log
(
LOG_TRACE_MEM
,
"MEM Load [%08x] %04x"
,
addr
,
data
);
return
true
;
}
bool
ARMDebug
::
apWrite
(
unsigned
addr
,
uint32_t
data
)
{
log
(
LOG_TRACE_AP
,
"AP Write [%x] %08x"
,
addr
,
data
);
...
...
This diff is collapsed.
Click to expand it.
testjig/production/arm_debug.h
+
4
−
0
View file @
6652be79
...
...
@@ -73,6 +73,10 @@ public:
bool
memStoreByte
(
uint32_t
addr
,
uint8_t
data
);
bool
memLoadByte
(
uint32_t
addr
,
uint8_t
&
data
);
// Halfword (16-bit) load/store operations (AHB bus)
bool
memStoreHalf
(
uint32_t
addr
,
uint16_t
data
);
bool
memLoadHalf
(
uint32_t
addr
,
uint16_t
&
data
);
// Poll for an expected value
bool
memPoll
(
unsigned
addr
,
uint32_t
&
data
,
uint32_t
mask
,
uint32_t
expected
,
unsigned
retries
=
DEFAULT_RETRIES
);
...
...
This diff is collapsed.
Click to expand it.
testjig/production/arm_kinetis_debug.cpp
+
21
−
2
View file @
6652be79
...
...
@@ -139,7 +139,7 @@ bool ARMKinetisDebug::peripheralInit()
if
(
!
memStoreAndVerify
(
0x20000000
,
0x76543210
))
return
false
;
// Test byte-wide
writ
es
// Test byte-wide
memory acc
es
s
uint32_t
word
;
uint8_t
byte
;
if
(
!
memStoreByte
(
0x20000001
,
0x55
))
...
...
@@ -155,7 +155,26 @@ bool ARMKinetisDebug::peripheralInit()
if
(
!
memLoadByte
(
0x20000003
,
byte
))
return
false
;
if
(
byte
!=
0x76
)
{
log
(
LOG_ERROR
,
"ARMKinetisDebug: Byte-wide AHB read seems broken! (Test byte = %08x)"
,
byte
);
log
(
LOG_ERROR
,
"ARMKinetisDebug: Byte-wide AHB read seems broken! (Test byte = %02x)"
,
byte
);
return
false
;
}
// Test halfword-wide memory access
uint16_t
half
;
if
(
!
memStoreHalf
(
0x20000000
,
0x5abc
))
return
false
;
if
(
!
memStoreHalf
(
0x20000002
,
0xdef0
))
return
false
;
if
(
!
memLoad
(
0x20000000
,
word
))
return
false
;
if
(
word
!=
0xdef05abc
)
{
log
(
LOG_ERROR
,
"ARMKinetisDebug: Halfword-wide AHB write seems broken! (Test word = %08x)"
,
word
);
return
false
;
}
if
(
!
memLoadHalf
(
0x20000002
,
half
))
return
false
;
if
(
half
!=
0xdef0
)
{
log
(
LOG_ERROR
,
"ARMKinetisDebug: Halfword-wide AHB read seems broken! (Test half = %04x)"
,
half
);
return
false
;
}
...
...
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