Commit 3d3d8f5f authored by Ye Li's avatar Ye Li
Browse files

MLK-12452-4 mx6sxsabreauto: Add secondary enet support 



Add configurations and board codes for second enet.

Signed-off-by: default avatarYe Li <ye.li@nxp.com>
(cherry picked from commit 4dfd06dc)
parent 62ae2d1d

board/freescale/mx6sxsabreauto/mx6sxsabreauto.c

+32 −7
Original line number Diff line number Diff line
@@ -65,6 +65,23 @@ static iomux_v3_cfg_t const uart1_pads[] = { 
	MX6_PAD_GPIO1_IO05__UART1_RX | MUX_PAD_CTRL(UART_PAD_CTRL),

};



static iomux_v3_cfg_t const fec1_pads[] = {

	MX6_PAD_ENET1_MDC__ENET1_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL),

	MX6_PAD_ENET1_MDIO__ENET1_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL),

	MX6_PAD_RGMII1_RX_CTL__ENET1_RX_EN | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),

	MX6_PAD_RGMII1_RD0__ENET1_RX_DATA_0 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),

	MX6_PAD_RGMII1_RD1__ENET1_RX_DATA_1 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),

	MX6_PAD_RGMII1_RD2__ENET1_RX_DATA_2 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),

	MX6_PAD_RGMII1_RD3__ENET1_RX_DATA_3 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),

	MX6_PAD_RGMII1_RXC__ENET1_RX_CLK | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),

	MX6_PAD_RGMII1_TX_CTL__ENET1_TX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL),

	MX6_PAD_RGMII1_TD0__ENET1_TX_DATA_0 | MUX_PAD_CTRL(ENET_PAD_CTRL),

	MX6_PAD_RGMII1_TD1__ENET1_TX_DATA_1 | MUX_PAD_CTRL(ENET_PAD_CTRL),

	MX6_PAD_RGMII1_TD2__ENET1_TX_DATA_2 | MUX_PAD_CTRL(ENET_PAD_CTRL),

	MX6_PAD_RGMII1_TD3__ENET1_TX_DATA_3 | MUX_PAD_CTRL(ENET_PAD_CTRL),

	MX6_PAD_RGMII1_TXC__ENET1_RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL),

};



static iomux_v3_cfg_t const fec2_pads[] = {

	MX6_PAD_ENET1_MDC__ENET2_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL),

	MX6_PAD_ENET1_MDIO__ENET2_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL),
@@ -87,24 +104,32 @@ static void setup_iomux_uart(void) 
	imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));

}



static int setup_fec(void)

static int setup_fec(int fec_id)

{

	struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;



	/* Use 125MHz anatop loopback REF_CLK1 for ENET2 */

	if (0 == fec_id)

		/* Use 125M anatop REF_CLK1 for ENET1, clear gpr1[13], gpr1[17]*/

		clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC1_MASK, 0);

	else

		/* Use 125M anatop REF_CLK1 for ENET2, clear gpr1[14], gpr1[18]*/

		clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC2_MASK, 0);



	return enable_fec_anatop_clock(1, ENET_125MHZ);

	return enable_fec_anatop_clock(fec_id, ENET_125MHZ);

}



int board_eth_init(bd_t *bis)

{

	int ret;



	if (0 == CONFIG_FEC_ENET_DEV)

		imx_iomux_v3_setup_multiple_pads(fec1_pads, ARRAY_SIZE(fec1_pads));

	else

		imx_iomux_v3_setup_multiple_pads(fec2_pads, ARRAY_SIZE(fec2_pads));

	setup_fec();



	ret = fecmxc_initialize_multi(bis, 1,

	setup_fec(CONFIG_FEC_ENET_DEV);



	ret = fecmxc_initialize_multi(bis, CONFIG_FEC_ENET_DEV,

		CONFIG_FEC_MXC_PHYADDR, IMX_FEC_BASE);

	if (ret)

		printf("FEC%d MXC: %s:failed\n", 1, __func__);

include/configs/mx6sxsabreauto.h

+7 −0
Original line number Diff line number Diff line
@@ -143,8 +143,15 @@ 
#define CONFIG_FEC_MXC

#define CONFIG_MII



#define CONFIG_FEC_ENET_DEV 1  /* Use onboard ethernet as default */



#if (CONFIG_FEC_ENET_DEV == 0)

#define IMX_FEC_BASE			ENET_BASE_ADDR

#define CONFIG_FEC_MXC_PHYADDR          0x0

#elif (CONFIG_FEC_ENET_DEV == 1)

#define IMX_FEC_BASE			ENET2_BASE_ADDR

#define CONFIG_FEC_MXC_PHYADDR          0x0

#endif



#define CONFIG_FEC_XCV_TYPE             RGMII

#define CONFIG_ETHPRIME                 "FEC"