From d7d7c4312b71dd3879fa8640b23f6a5bac30e303 Mon Sep 17 00:00:00 2001
From: Anson Huang <Anson.Huang@nxp.com>
Date: Thu, 24 Mar 2016 17:41:08 +0800
Subject: [PATCH] MLK-12576 imx: imx6ul: disable POR_B internal pull up
From TO1.1, SNVS adds internal pull up control for POR_B,
the register filed is GPBIT[1:0], after system boot up,
it can be set to 2b'01 to disable internal pull up.
It can save about 30uA power in SNVS mode.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
arch/arm/cpu/armv7/mx6/soc.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index 46899240dc..c725fcadef 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -477,6 +477,15 @@ int arch_cpu_init(void)
* drain 100K (0x0000b8a0).
*/
writel(0x0000b8a0, IOMUXC_BASE_ADDR + 0x29c);
+ } else {
+ /*
+ * From TO1.1, SNVS adds internal pull up control for POR_B,
+ * the register filed is GPBIT[1:0], after system boot up,
+ * it can be set to 2b'01 to disable internal pull up.
+ * It can save about 30uA power in SNVS mode.
+ */
+ writel((readl(SNVS_LP_BASE_ADDR + 0x10) & (~0x1400)) | 0x400,
+ SNVS_LP_BASE_ADDR + 0x10);
}
#endif
--
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