From 3b1b0f40893472042d19f8347356546e4e69a5e0 Mon Sep 17 00:00:00 2001 From: Ye Li <ye.li@nxp.com> Date: Fri, 17 Mar 2017 15:38:43 +0800 Subject: [PATCH] MLK-14483 mx7ulp: Fix SPLL/APLL clock rate calculation issue The num/denom is a float value, but in the calculation it is convert to integer 0, and cause the result wrong. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 4a8f51499ca098637e9ee2036066374d34458865) --- arch/arm/cpu/armv7/mx7ulp/scg.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv7/mx7ulp/scg.c b/arch/arm/cpu/armv7/mx7ulp/scg.c index 35d962ca59..d6ece80583 100644 --- a/arch/arm/cpu/armv7/mx7ulp/scg.c +++ b/arch/arm/cpu/armv7/mx7ulp/scg.c @@ -498,7 +498,9 @@ u32 decode_pll(enum pll_clocks pll) num = readl(&scg1_regs->spllnum); denom = readl(&scg1_regs->splldenom); - return (infreq / pre_div) * (mult + num / denom); + infreq = infreq / pre_div; + + return infreq * mult + infreq * num / denom; case PLL_A7_APLL: reg = readl(&scg1_regs->apllcsr); @@ -525,7 +527,9 @@ u32 decode_pll(enum pll_clocks pll) num = readl(&scg1_regs->apllnum); denom = readl(&scg1_regs->aplldenom); - return (infreq / pre_div) * (mult + num / denom); + infreq = infreq / pre_div; + + return infreq * mult + infreq * num / denom; case PLL_USB: reg = readl(&scg1_regs->upllcsr); -- GitLab