- 29 Apr, 2015 1 commit
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Nitin Garg authored
Under very rare timing circumstances, transitioning into streaming mode might create a data corruption. Present on Two or more processors or 1 core with ACP, all revisions. This erratum can be worked round by setting bit[22] of the undocumented Diagnostic Control Register to 1. Signed-off-by:
Nitin Garg <nitin.garg@freescale.com> (cherry picked from commit 70ad44e523680de67dd8b7a7505d7f27799980ee)
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- 24 Mar, 2015 1 commit
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Rob Herring authored
Various files are needlessly rebuilt every time due to the version and build time changing. As version.h is not actually needed, remove the include. Signed-off-by:
Rob Herring <robh@kernel.org> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Stefano Babic <sbabic@denx.de> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Marek Vasut <marex@denx.de> Cc: Tom Warren <twarren@nvidia.com> Cc: Michal Simek <monstr@monstr.eu> Cc: Macpaul Lin <macpaul@andestech.com> Cc: Wolfgang Denk <wd@denx.de> Cc: York Sun <yorksun@freescale.com> Cc: Stefan Roese <sr@denx.de> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Philippe Reynes <tremyfr@yahoo.fr> Cc: Eric Jarrige <eric.jarrige@armadeus.org> Cc: "David Müller" <d.mueller@elsoft.ch> Cc: Phil Edworthy <phil.edworthy@renesas.com> Cc: Robert Baldyga <r.baldyga@samsung.com> Cc: Torsten Koschorrek <koschorrek@synertronixx.de> Cc: Anatolij Gustschin <agust@denx.de> Reviewed-by:
Linus Walleij <linus.walleij@linaro.org> Reviewed-by:
Łukasz Majewski <l.majewski@samsung.com>
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- 13 Mar, 2015 4 commits
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Nishanth Menon authored
621766: Under a specific set of conditions, executing a sequence of NEON or vfp load instructions can cause processor deadlock Impacts: Every Cortex-A8 processors with revision lower than r2p1 Work around: Set L1NEON to 1 Based on ARM errata Document revision 20.0 (13 Nov 2010) Signed-off-by:
Nishanth Menon <nm@ti.com> Tested-by:
Matt Porter <mporter@konsulko.com> Reviewed-by:
Tom Rini <trini@konsulko.com>
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Nishanth Menon authored
430973: Stale prediction on replaced inter working branch causes Cortex-A8 to execute in the wrong ARM/Thumb state Impacts: Every Cortex-A8 processors with revision lower than r2p1 Work around: Set IBE to 1 Based on ARM errata Document revision 20.0 (13 Nov 2010) Signed-off-by:
Nishanth Menon <nm@ti.com> Tested-by:
Matt Porter <mporter@konsulko.com> Reviewed-by:
Tom Rini <trini@konsulko.com>
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Nishanth Menon authored
454179: Stale prediction may inhibit target address misprediction on next predicted taken branch Impacts: Every Cortex-A8 processors with revision lower than r2p1 Work around: Set IBE and disable branch size mispredict to 1 Also provide a hook for SoC specific handling to take place if needed. Based on ARM errata Document revision 20.0 (13 Nov 2010) Signed-off-by:
Nishanth Menon <nm@ti.com> Tested-by:
Matt Porter <mporter@konsulko.com> Reviewed-by:
Tom Rini <trini@konsulko.com>
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Nishanth Menon authored
Add workaround for Cortex-A15 ARM erratum 798870 which says "If back-to-back speculative cache line fills (fill A and fill B) are issued from the L1 data cache of a CPU to the L2 cache, the second request (fill B) is then cancelled, and the second request would have detected a hazard against a recent write or eviction (write B) to the same cache line as fill B then the L2 logic might deadlock." Implementations for SoC families such as Exynos, OMAP5/DRA7 etc will be widely different. Every SoC has slightly different manner of setting up access to L2ACLR and similar registers since the Secure Monitor handling of Secure Monitor Call(smc) is diverse. Hence an weak function is introduced which may be overriden to implement SoC specific accessor implementation. Based on ARM errata Document revision 18.0 (22 Nov 2013) Signed-off-by:
Nishanth Menon <nm@ti.com> Tested-by:
Matt Porter <mporter@konsulko.com> Reviewed-by:
Tom Rini <trini@konsulko.com>
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- 16 Feb, 2015 3 commits
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Siarhei Siamashka authored
So that the CONFIG_SPL_FEL option is not needed anymore. And the regular SPL binary, generated by the default u-boot build, is now also bootable over USB in the FEL mode. The SPL still can boot from the SD card too. A bunch of system registers need to be saved/restored in order to ensure that the IRQ handler still works in the BROM FEL code after getting control back from the SPL. This is done in the sunxi code instead of abusing ifdefs in 'start.S'. The decision whether to load the main u-boot binary from the SD card or return to the FEL code in the BROM is done at runtime. Signed-off-by:
Siarhei Siamashka <siarhei.siamashka@gmail.com> [hdegoede@redhat.com: Since we now restore various regs before returning to the FEL BROM code we can drop the sunxi specific #ifdefs in start.S] Acked-by:
Hans de Goede <hdegoede@redhat.com> Signed-off-by:
Hans de Goede <hdegoede@redhat.com>
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Simon Glass authored
Make sunxi's FEL code fit with the normal U-Boot boot sequence instead of creating its own. There are some #ifdefs required in start.S. Future work will hopefully remove these. This series is available at u-boot-dm, branch sunxi-working. Signed-off-by:
Simon Glass <sjg@chromium.org> Acked-by:
Hans de Goede <hdegoede@redhat.com> Signed-off-by:
Hans de Goede <hdegoede@redhat.com>
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Simon Glass authored
The link register value can be required on some boards (e.g. FEL mode on sunxi) so use a branch instruction to jump to save_boot_params() instead of a branch link. This requires a branch back to save_boot_params_ret so adjust the users to deal with this. For exynos just drop the function since it doesn't do anything. Signed-off-by:
Simon Glass <sjg@chromium.org> Acked-by:
Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by:
Hans de Goede <hdegoede@redhat.com> Signed-off-by:
Hans de Goede <hdegoede@redhat.com>
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- 30 Jan, 2015 1 commit
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Peng Fan authored
SCTLR is the abbreviation of System Control Register, so we should use SCTLR but not SCTRL. Signed-off-by:
Peng Fan <Peng.Fan@freescale.com>
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- 29 Oct, 2014 1 commit
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Georges Savoundararadj authored
This commit relocates the exception vectors. As ARM1176 and ARMv7 have the security extensions, it uses VBAR. For the other ARM processors, it copies the relocated exception vectors to the correct address: 0x00000000 or 0xFFFF0000. Signed-off-by:
Georges Savoundararadj <savoundg@gmail.com> Acked-by:
Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Tom Warren <twarren@nvidia.com>
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- 15 May, 2014 2 commits
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Albert ARIBAUD authored
Exception handling is basically identical for all ARM targets. Factorize it out of the various start.S files and into a single vectors.S file, and adjust linker scripts accordingly. Signed-off-by:
Albert ARIBAUD <albert.u.boot@aribaud.net>
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Albert ARIBAUD authored
Signed-off-by:
Albert ARIBAUD <albert.u.boot@aribaud.net>
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- 07 Apr, 2014 2 commits
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Nitin Garg authored
Full cache line writes to the same memory region from at least two processors might deadlock the processor. Exists on r1, r2, r3 revisions. Signed-off-by:
Nitin Garg <nitin.garg@freescale.com> Acked-by:
Fabio Estevam <fabio.estevam@freescale.com>
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Nitin Garg authored
A short loop including a DMB instruction might cause a denial of service on another processor which executes a CP15 broadcast operation. Exists on r1, r2, r3, r4 revisions. Signed-off-by:
Nitin Garg <nitin.garg@freescale.com> Acked-by:
Dirk Behme <dirk.behme@de.bosch.com>
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- 26 Feb, 2014 1 commit
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Albert ARIBAUD authored
Remove the last uses of symbol offsets in ARM U-Boot. Remove some needless uses of _TEXT_BASE. Remove all _TEXT_BASE definitions. Signed-off-by:
Albert ARIBAUD <albert.u.boot@aribaud.net>
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- 26 Jan, 2014 1 commit
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Marek Vasut authored
Make indirect vectors addresses global, so they can be replaced by various code that needs to do so. For example the MX6 PCI express driver needs to temporarily replace data abort handler when reading the config space. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
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- 14 Oct, 2013 1 commit
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Wolfgang Denk authored
Signed-off-by:
Wolfgang Denk <wd@denx.de>
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- 24 Jul, 2013 1 commit
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Wolfgang Denk authored
Signed-off-by:
Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by:
Tom Rini <trini@ti.com>
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- 30 May, 2013 2 commits
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Albert ARIBAUD authored
Replace all relocate_code routines from ARM start.S files with a single instance in file arch/arm/lib/relocate.S. For PXA, this requires moving the dcache unlocking code from within relocate_code into c_runtime_cpu_setup. Signed-off-by:
Albert ARIBAUD <albert.u.boot@aribaud.net> Reviewed-by:
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Tested-by:
Simon Glass <sjg@chromium.org>
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Albert ARIBAUD authored
Signed-off-by:
Albert ARIBAUD <albert.u.boot@aribaud.net> Reviewed-by:
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Tested-by:
Simon Glass <sjg@chromium.org>
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- 15 Apr, 2013 2 commits
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Tom Warren authored
A start vector fix was added by AneeshV for OMAP4 (commit 0d479b53), and caused the old monilithic Tegra builds to hang due to an undefined instruction trap. Previously, the code needed to run on both the AVP (ARM7TDI) and A9, and the AVP doesn't have a CP15 register. I corrected this in commit 6d6c0bae w/#ifndef CONFIG_TEGRA, but now that we use SPL, and boot the AVP w/o any ARMv7 code, I can revert my change, and make Aneesh's change apply to Tegra. Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Andre Przywara authored
The KVM and Xen hypervisors for the Cortex-A15 virtualization implementation need to be entered in HYP mode. Should the primary board firmware already enter HYP mode (Calxeda firmware does that), we should not deliberately drop back to SVC mode. Since U-boot does not use the MMU, running in HYP mode is just fine. Signed-off-by:
Andre Przywara <andre.przywara@linaro.org>
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- 13 Apr, 2013 1 commit
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Tetsuyuki Kobayashi authored
When swi instruction is executed, it is expected to get message "software interrupt" in console and dump registers and reboot, as do_software_interrupt() in arch/arm/lib/interrupts.c. But, actually it causes data abort accessing wrong address in get_bad_stack_swi macro in arch/arm/cpu/v7/start.S. This patch fixes this problem. The same mistake in arch/arm/cpu/{arm1136,arm1176,pxa}/start.S. Signed-off-by:
Tetsuyuki Kobayashi <koba@kmckk.co.jp>
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- 12 Apr, 2013 5 commits
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Benoît Thébaudeau authored
Commit e05e5de7 made the 2 1st parameters of ARM's relocate_code() useless since it moved the code handling them to crt0.S. So, drop these parameters. Signed-off-by:
Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
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Benoît Thébaudeau authored
Use __image_copy_end instead of __bss_start for the end of the image to relocate. This is the same as commit 033ca724 , but applied to all ARM start.S. This is a more appropriate symbol naming for an image copy & relocate feature, and this also saves a useless copy of data put between __image_copy_end and __bss_start in linker scripts (e.g. relocation information, or MMU initialization tables used only before jumping to the relocated image). Signed-off-by:
Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
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Benoît Thébaudeau authored
Signed-off-by:
Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
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Benoît Thébaudeau authored
Commit e05e5de7 made ARM's relocate_code() return to its caller, but it did not update its declaration accordingly. Fixing this function declaration fixes dropped C code following calls to relocate_code(). Signed-off-by:
Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
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Benoît Thébaudeau authored
_TEXT_BASE must be set to CONFIG_SPL_TEXT_BASE for generic SPL, and to CONFIG_SYS_TEXT_BASE for non-SPL builds. Signed-off-by:
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Reviewed-by:
Tom Rini <trini@ti.com>
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- 28 Mar, 2013 1 commit
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Vincent Stehlé authored
The _start symbol is already relocated, so do not add the relocation the second time in c_runtime_cpu_setup. This fixes e.g. the abort exception handling path, which ended in double fault due to bad address in VBAR. Signed-off-by:
Vincent Stehlé <v-stehle@ti.com> Reported-by:
Lubomir Popov <lpopov@mm-sol.com>
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- 22 Mar, 2013 1 commit
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Stephen Warren authored
Add common code to enable the workaround for ARM erratum 716044. This will be enabled for Tegra. Signed-off-by:
Stephen Warren <swarren@nvidia.com>
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- 15 Mar, 2013 1 commit
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Simon Glass authored
Note this is a tree-wide change affecting multiple architectures. At present we use __bss_start, but mostly __bss_end__. This seems inconsistent and in a number of places __bss_end is used instead. Change to use __bss_end for the BSS end symbol throughout U-Boot. This makes it possible to use the asm-generic/sections.h file on all archs. Signed-off-by:
Simon Glass <sjg@chromium.org>
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- 13 Mar, 2013 1 commit
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Stephen Warren authored
Various errata exist in the Cortex-A9 CPU, and may be worked around by setting some bits in a CP15 diagnostic register. Add code to implement the workarounds, enabled by new CONFIG_ options. This code was taken from the Linux kernel, v3.8, arch/arm/mm/proc-v7.S, and modified to remove the logic to conditionally apply the WAR (since we know exactly which CPU we're running on given the U-Boot configuration), and use r0 instead of r10 for consistency with the rest of U-Boot's cpu_init_cp15(). Signed-off-by:
Stephen Warren <swarren@nvidia.com> Acked-by:
Simon Glass <sjg@chromium.org>
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- 16 Jan, 2013 1 commit
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Tom Warren authored
This patch adds basic Tegra30 (T30) build support - no specific board is targeted. Signed-off-by:
Tom Warren <twarren@nvidia.com> Reviewed-by:
Stephen Warren <swarren@nvidia.com>
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- 08 Jan, 2013 1 commit
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Albert ARIBAUD authored
Move all the C runtime setup code from every start.S in arch/arm into arch/arm/lib/crt0.S. This covers the code sequence from setting up the initial stack to calling into board_init_r(). Also, rewrite the C runtime setup and make functions board_init_*() and relocate_code() behave according to normal C semantics (no jumping across the C stack any more, etc). Some SPL targets had to be touched because they use start.S explicitly or for some reason; the relevant maintainers and custodians are cc:ed. Signed-off-by:
Albert ARIBAUD <albert.u.boot@aribaud.net>
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- 04 Oct, 2012 1 commit
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Benoît Thébaudeau authored
We don't need to return to cpu_init_crit after calling lowlevel_init, so lowlevel_init can directly return to the caller of cpu_init_crit. Signed-off-by:
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
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- 27 Sep, 2012 1 commit
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Tom Rini authored
In SPL (CONFIG_SPL_FRAMEWORK) board_init_f must setup the stack pointer, clear the BSS and call board_init_r. We mark this as weak as some platforms may need to perform additional initalization at this point. We provide a gd that we know will be in a usable location, once the BSS has been cleared to help with this as well. Finally, we no longer call relocate_code so remove that from the armv7 version. Next, both board_init_f and jump_to_image_linux are going to be inherently arch-specific, so move these versions to arch/arm/lib/spl.c Signed-off-by:
Tom Rini <trini@ti.com>
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- 01 Sep, 2012 3 commits
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Tetsuyuki Kobayashi authored
save_boot_params_default() in cpu.c accesses uninitialized stack area when it compiled with -O0 (not optimized). This patch removes save_boot_params_default() and put the equivalent in start.S Signed-off-by:
Tetsuyuki Kobayashi <koba@kmckk.co.jp> Acked-by:
Tom Rini <trini@ti.com>
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Allen Martin authored
Add SPL options to tegra20 config files and enable SPL build for tegra20 boards. Also remove redundant code from u-boot that is not contained in SPL. Signed-off-by:
Allen Martin <amartin@nvidia.com> Acked-by:
Stephen Warren <swarren@wwwdotorg.org> Tested-by:
Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Allen Martin authored
This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code. Signed-off-by:
Allen Martin <amartin@nvidia.com> Acked-by:
Stephen Warren <swarren@wwwdotorg.org> Tested-by:
Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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