1. 08 Feb, 2017 1 commit
  2. 23 Jan, 2017 2 commits
  3. 20 Jan, 2017 1 commit
  4. 17 Jan, 2017 1 commit
  5. 11 Jan, 2017 1 commit
  6. 06 Jan, 2017 1 commit
  7. 05 Jan, 2017 2 commits
  8. 22 Dec, 2016 3 commits
  9. 21 Dec, 2016 1 commit
  10. 20 Dec, 2016 3 commits
  11. 07 Dec, 2016 2 commits
  12. 01 Dec, 2016 1 commit
  13. 29 Nov, 2016 2 commits
  14. 11 Nov, 2016 1 commit
  15. 06 Oct, 2016 1 commit
  16. 05 Oct, 2016 1 commit
  17. 04 Oct, 2016 1 commit
  18. 03 Oct, 2016 1 commit
  19. 02 Oct, 2016 1 commit
  20. 21 Sep, 2016 1 commit
  21. 06 Jun, 2016 2 commits
    • Peng Fan's avatar
      MLK-12883 usb: limit USB_MAX_XFER_BLK to 256 · ede7538a
      Peng Fan authored
      For Some USB mass storage devices, such as:
       - Kingston DataTraveler 2.0 001D7D06CF09B04199C7B3EA
       - Class: (from Interface) Mass Storage
       - PacketSize: 64  Configurations: 1
       - Vendor: 0x0930  Product 0x6545 Version 1.16
      When `usb read 0x80000000 0 0x2000`, we met
      "EHCI timed out on TD - token=0x80008d80".
      The devices does not support scsi VPD page, we are not able
      to get the maximum transfer length for READ(10)/WRITE(10).
      So we limit this to 256 blocks as READ(6).
      Signed-off-by: default avatarPeng Fan <peng.fan@nxp.com>
      (cherry picked from commit df0052575b2bc9d66ae73584768e1a457ed5d914)
    • Ye Li's avatar
      MLK-12884 mx7dsabresd: Fix LCD_PWR_EN output setting · 68f095be
      Ye Li authored
      LCD_PWR_EN controls the G pin of Q13 PMOS which needs low voltage to connect
      D to S for outputting LCD 3.3V. If LCD_PWR_EN is high, we measured the LCD 3v3
      is actually 1.2V.
      Signed-off-by: default avatarYe Li <ye.li@nxp.com>
      (cherry picked from commit 28eb616b6c49de492cc0cdb3ad5b618bed77960f)
  22. 31 May, 2016 1 commit
  23. 24 May, 2016 4 commits
    • Stefan Agner's avatar
      imx: iomux-v3: fix UART input selects · 5854563c
      Stefan Agner authored
      Several UART input selects are missing. The fourth input select
      for UART2_TX_DATA_ALT0 is actually also missing in the documentation.
      (at least in Rev. B of the i.MX 7Dual Reference Manual). However,
      when looking at the tables of other input selects, it is very natural
      that there must be an input select for the UART2_TX_DATA_ALT0 pad.
      The Colibri iMX7 also uses that pad for UART2 RX (in DTE mode), and
      it was required to set that particular input select register to get a
      working UART2.
      From https://www.mail-archive.com/u-boot@lists.denx.de/msg211942.html
      Signed-off-by: default avatarPeng Fan <peng.fan@nxp.com>
      (cherry picked from commit ee6717667799d70a42f00ba46d96f3f34c78f497)
    • Peng Fan's avatar
      MLK-12693-2 nand: mxs: correct bitflip for erased NAND page · fb748a22
      Peng Fan authored
      This patch is a porting of
      i.MX6QP and i.MX7D BCH module integrated a new feature to detect the
      bitflip number for erased NAND page. So for these two platform, set the
      erase threshold to gf/2 and if bitflip detected, GPMI driver will
      correct the data to all 0xFF.
      Also updated the imx6qp dts file to ditinguish the GPMI module for i.MX6Q
      with the one for i.MX6QP.
      In this patch, i.MX6UL is added and threshold changed to use ecc_strength.
      Signed-off-by: default avatarPeng Fan <peng.fan@nxp.com>
      (cherry picked from commit 489929be0221bb7d4c46bb5bc6083650b78f73e0)
    • Peng Fan's avatar
      MLK-12693-1 nand: mxs: fix the bitflips for erased page when uncorrectable error · 79685d64
      Peng Fan authored
      This patch is porting from linux:
      We may meet the bitflips in reading an erased page(contains all 0xFF),
      this may causes the UBIFS corrupt, please see the log from Elie:
      [    3.831323] UBI warning: ubi_io_read: error -74 (ECC error) while reading 16384 bytes from PEB 443:245760, read only 16384 bytes, retry
      [    3.845026] UBI warning: ubi_io_read: error -74 (ECC error) while reading 16384 bytes from PEB 443:245760, read only 16384 bytes, retry
      [    3.858710] UBI warning: ubi_io_read: error -74 (ECC error) while reading 16384 bytes from PEB 443:245760, read only 16384 bytes, retry
      [    3.872408] UBI error: ubi_io_read: error -74 (ECC error) while reading 16384 bytes from PEB 443:245760, read 16384 bytes
      [    4.011529] UBIFS error (pid 36): ubifs_recover_leb: corrupt empty space LEB 27:237568, corruption starts at 9815
      [    4.021897] UBIFS error (pid 36): ubifs_scanned_corruption: corruption at LEB 27:247383
      [    4.030000] UBIFS error (pid 36): ubifs_scanned_corruption: first 6569 bytes from LEB 27:247383
      This patch does a check for the uncorrectable failure in the following steps:
         [0] set the threshold.
             The threshold is set based on the truth:
             "A single 0 bit will lead to gf_len(13 or 14) bits 0 after the BCH
              do the ECC."
              For the sake of safe, we will set the threshold with half the gf_len, and
              do not make it bigger the ECC strength.
         [1] count the bitflips of the current ECC chunk, assume it is N.
         [2] if the (N <= threshold) is true, we continue to read out the page with
             ECC disabled. and we count the bitflips again, assume it is N2.
             (We read out the whole page, not just a chunk, this makes the check
              more strictly, and make the code more simple.)
         [3] if the (N2 <= threshold) is true again, we can regard this is a erased
             page. This is because a real erased page is full of 0xFF(maybe also has
             several bitflips), while a page contains the 0xFF data will definitely
             has many bitflips in the ECC parity areas.
         [4] if the [3] fails, we can regard this is a page filled with the '0xFF'
      Signed-off-by: default avatarPeng Fan <peng.fan@nxp.com>
      (cherry picked from commit ceb324a2914487aa517a6c70a06a20b5e3438fda)
    • Stefan Agner's avatar
      imx: imx7d: fix ahb clock mux 1 · c5c685a7
      Stefan Agner authored
      The clock parent of the AHB root clock when using mux option 1
      is the SYS PLL 270MHz clock. This is specified in  Table 5-11
      Clock Root Table of the i.MX 7Dual Applications Processor
      Reference Manual.
      While it could be a documentation error, the 270MHz parent is
      also mentioned in the boot ROM configuration in Table 6-28: The
      clock is by default at 135MHz due to a POST_PODF value of 1
      (=> divider of 2).
      Signed-off-by: default avatarStefan Agner <stefan@agner.ch>
      (cherry picked from commit 8183b60202754d9d33ac1a2a68a5cc2cc4640fc6)
  24. 23 May, 2016 4 commits
  25. 16 May, 2016 1 commit