diff --git a/cpu/microblaze/Makefile b/cpu/microblaze/Makefile
index db1afa553ddecc4b40782a6c16670deca48a9b03..b7be5e146cb5379975414daadfb6a745c1ebf9fe 100644
--- a/cpu/microblaze/Makefile
+++ b/cpu/microblaze/Makefile
@@ -26,7 +26,8 @@ include $(TOPDIR)/config.mk
 LIB	= $(obj)lib$(CPU).a
 
 START	= start.o
-SOBJS	= dcache.o icache.o irq.o disable_int.o enable_int.o
+#SOBJS	= dcache.o icache.o irq.o disable_int.o enable_int.o
+SOBJS	= dcache.o icache.o irq.o
 COBJS	= cpu.o interrupts.o cache.o exception.o timer.o
 
 SRCS	:= $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/cpu/microblaze/interrupts.c b/cpu/microblaze/interrupts.c
index 115e58d7f08e36aaec041a5210d007024c375343..c0c92ec5599398fb1ac31643518c551b4ed37b39 100644
--- a/cpu/microblaze/interrupts.c
+++ b/cpu/microblaze/interrupts.c
@@ -36,12 +36,14 @@ extern void microblaze_enable_interrupts (void);
 
 void enable_interrupts (void)
 {
-	microblaze_enable_interrupts ();
+	__asm__ __volatile__ ("msrset r0, 0x2");
+	//microblaze_enable_interrupts ();
 }
 
 int disable_interrupts (void)
 {
-	microblaze_disable_interrupts ();
+	__asm__ __volatile__ ("msrclr r0, 0x2");
+	//microblaze_disable_interrupts ();
 	return 0;
 }
 
@@ -49,6 +51,10 @@ int disable_interrupts (void)
 #ifdef CFG_TIMER_0
 extern void timer_init (void);
 #endif
+#ifdef CFG_FSL_2
+extern void fsl_init2 (void);
+#endif
+
 
 static struct irq_action vecs[CFG_INTC_0_NUM];
 
@@ -140,6 +146,9 @@ int interrupts_init (void)
 	intc_init ();
 #ifdef CFG_TIMER_0
 	timer_init ();
+#endif
+#ifdef CFG_FSL_2
+	fsl_init2 ();
 #endif
 	enable_interrupts ();
 	return 0;