diff --git a/board/espt/lowlevel_init.S b/board/espt/lowlevel_init.S
index 7d5d72e123ff36e257aafa9c30c90701b4d1e707..7f0686c536bd120c671a3dff784917803723e9a7 100644
--- a/board/espt/lowlevel_init.S
+++ b/board/espt/lowlevel_init.S
@@ -72,15 +72,7 @@ lowlevel_init:
/* set DDR-SDRAM dummy read */
write32 MMSEL_A, MMSEL_D
- mov.l MMSEL_A, r0
- synco
- mov.l @r0, r1
- synco
-
- mov.l CS0_A, r0
- synco
- mov.l @r0, r1
- synco
+ write32 MMSEL_A, CS0_A
/* set DDR-SDRAM bus/endian etc */
write32 MIM_U_A, MIM_U_D
diff --git a/board/renesas/sh7785lcr/lowlevel_init.S b/board/renesas/sh7785lcr/lowlevel_init.S
index 7faad95ffd7e3c72a9c3877e3d4db0d6d33ad530..40d9b08c7ddd47c1618e991fc7e7207571d0ae86 100644
--- a/board/renesas/sh7785lcr/lowlevel_init.S
+++ b/board/renesas/sh7785lcr/lowlevel_init.S
@@ -178,60 +178,6 @@ lbsc_end:
.align 4
-/*------- LBSC -------*/
-MMSELR_A: .long 0xfc400020
-#if defined(CONFIG_SH_32BIT)
-MMSELR_D: .long 0xa5a50005
-#else
-MMSELR_D: .long 0xa5a50002
-#endif
-
-/*------- DBSC2 -------*/
-#define DBSC2_BASE 0xfe800000
-DBSC2_DBSTATE_A: .long DBSC2_BASE + 0x0c
-DBSC2_DBEN_A: .long DBSC2_BASE + 0x10
-DBSC2_DBCMDCNT_A: .long DBSC2_BASE + 0x14
-DBSC2_DBCONF_A: .long DBSC2_BASE + 0x20
-DBSC2_DBTR0_A: .long DBSC2_BASE + 0x30
-DBSC2_DBTR1_A: .long DBSC2_BASE + 0x34
-DBSC2_DBTR2_A: .long DBSC2_BASE + 0x38
-DBSC2_DBRFCNT0_A: .long DBSC2_BASE + 0x40
-DBSC2_DBRFCNT1_A: .long DBSC2_BASE + 0x44
-DBSC2_DBRFCNT2_A: .long DBSC2_BASE + 0x48
-DBSC2_DBRFSTS_A: .long DBSC2_BASE + 0x4c
-DBSC2_DBFREQ_A: .long DBSC2_BASE + 0x50
-DBSC2_DBDICODTOCD_A: .long DBSC2_BASE + 0x54
-DBSC2_DBMRCNT_A: .long DBSC2_BASE + 0x60
-DDR_DUMMY_ACCESS_A: .long 0x40000000
-
-DBSC2_DBCONF_D: .long 0x00630002
-DBSC2_DBTR0_D: .long 0x050b1f04
-DBSC2_DBTR1_D: .long 0x00040204
-DBSC2_DBTR2_D: .long 0x02100308
-DBSC2_DBFREQ_D1: .long 0x00000000
-DBSC2_DBFREQ_D2: .long 0x00000100
-DBSC2_DBDICODTOCD_D: .long 0x000f0907
-
-DBSC2_DBCMDCNT_D_CKE_H: .long 0x00000003
-DBSC2_DBCMDCNT_D_PALL: .long 0x00000002
-DBSC2_DBCMDCNT_D_REF: .long 0x00000004
-
-DBSC2_DBMRCNT_D_EMRS2: .long 0x00020000
-DBSC2_DBMRCNT_D_EMRS3: .long 0x00030000
-DBSC2_DBMRCNT_D_EMRS1_1: .long 0x00010006
-DBSC2_DBMRCNT_D_EMRS1_2: .long 0x00010386
-DBSC2_DBMRCNT_D_MRS_1: .long 0x00000952
-DBSC2_DBMRCNT_D_MRS_2: .long 0x00000852
-
-DBSC2_DBEN_D: .long 0x00000001
-
-DBSC2_DBPDCNT0_D3: .long 0x00000080
-DBSC2_DBRFCNT1_D: .long 0x00000926
-DBSC2_DBRFCNT2_D: .long 0x00fe00fe
-DBSC2_DBRFCNT0_D: .long 0x00010000
-
-WAIT_200US: .long 33333
-
/*------- GPIO -------*/
PACR_D: .long 0x0000
PBCR_D: .long 0x0000
@@ -291,6 +237,59 @@ PPUPR2_A: .long GPIO_BASE + 0x62
P1MSELR_A: .long GPIO_BASE + 0x80
P2MSELR_A: .long GPIO_BASE + 0x82
+MMSELR_A: .long 0xfc400020
+#if defined(CONFIG_SH_32BIT)
+MMSELR_D: .long 0xa5a50005
+#else
+MMSELR_D: .long 0xa5a50002
+#endif
+
+/*------- DBSC2 -------*/
+#define DBSC2_BASE 0xfe800000
+DBSC2_DBSTATE_A: .long DBSC2_BASE + 0x0c
+DBSC2_DBEN_A: .long DBSC2_BASE + 0x10
+DBSC2_DBCMDCNT_A: .long DBSC2_BASE + 0x14
+DBSC2_DBCONF_A: .long DBSC2_BASE + 0x20
+DBSC2_DBTR0_A: .long DBSC2_BASE + 0x30
+DBSC2_DBTR1_A: .long DBSC2_BASE + 0x34
+DBSC2_DBTR2_A: .long DBSC2_BASE + 0x38
+DBSC2_DBRFCNT0_A: .long DBSC2_BASE + 0x40
+DBSC2_DBRFCNT1_A: .long DBSC2_BASE + 0x44
+DBSC2_DBRFCNT2_A: .long DBSC2_BASE + 0x48
+DBSC2_DBRFSTS_A: .long DBSC2_BASE + 0x4c
+DBSC2_DBFREQ_A: .long DBSC2_BASE + 0x50
+DBSC2_DBDICODTOCD_A:.long DBSC2_BASE + 0x54
+DBSC2_DBMRCNT_A: .long DBSC2_BASE + 0x60
+DDR_DUMMY_ACCESS_A: .long 0x40000000
+
+DBSC2_DBCONF_D: .long 0x00630002
+DBSC2_DBTR0_D: .long 0x050b1f04
+DBSC2_DBTR1_D: .long 0x00040204
+DBSC2_DBTR2_D: .long 0x02100308
+DBSC2_DBFREQ_D1: .long 0x00000000
+DBSC2_DBFREQ_D2: .long 0x00000100
+DBSC2_DBDICODTOCD_D:.long 0x000f0907
+
+DBSC2_DBCMDCNT_D_CKE_H: .long 0x00000003
+DBSC2_DBCMDCNT_D_PALL: .long 0x00000002
+DBSC2_DBCMDCNT_D_REF: .long 0x00000004
+
+DBSC2_DBMRCNT_D_EMRS2: .long 0x00020000
+DBSC2_DBMRCNT_D_EMRS3: .long 0x00030000
+DBSC2_DBMRCNT_D_EMRS1_1: .long 0x00010006
+DBSC2_DBMRCNT_D_EMRS1_2: .long 0x00010386
+DBSC2_DBMRCNT_D_MRS_1: .long 0x00000952
+DBSC2_DBMRCNT_D_MRS_2: .long 0x00000852
+
+DBSC2_DBEN_D: .long 0x00000001
+
+DBSC2_DBPDCNT0_D3: .long 0x00000080
+DBSC2_DBRFCNT1_D: .long 0x00000926
+DBSC2_DBRFCNT2_D: .long 0x00fe00fe
+DBSC2_DBRFCNT0_D: .long 0x00010000
+
+WAIT_200US: .long 33333
+
/*------- LBSC -------*/
PASCR_A: .long 0xff000070
PASCR_32BIT_MODE: .long 0x80000000 /* check booting mode */
diff --git a/lib_nios/board.c b/lib_nios/board.c
index 72713a8fec7aebd8db2e15a300efee93343dc6b3..5d2fb2ec4afd849d23ec661588b2cdbf3826049b 100644
--- a/lib_nios/board.c
+++ b/lib_nios/board.c
@@ -49,7 +49,6 @@ DECLARE_GLOBAL_DATA_PTR;
*/
-extern void malloc_bin_reloc (void);
typedef int (init_fnc_t) (void);
@@ -115,7 +114,6 @@ void board_init (void)
/* The Malloc area is immediately below the monitor copy in RAM */
mem_malloc_init(CONFIG_SYS_MALLOC_BASE, CONFIG_SYS_MALLOC_LEN);
- malloc_bin_reloc();
WATCHDOG_RESET ();
bd->bi_flashsize = flash_init();
diff --git a/lib_nios2/board.c b/lib_nios2/board.c
index c6b36f4a2ef1e35903c535abfab261d743627d1c..008f04f956277ddabe75cca2850c38e5d51ac306 100644
--- a/lib_nios2/board.c
+++ b/lib_nios2/board.c
@@ -52,7 +52,6 @@ DECLARE_GLOBAL_DATA_PTR;
*/
-extern void malloc_bin_reloc (void);
typedef int (init_fnc_t) (void);
@@ -121,7 +120,6 @@ void board_init (void)
/* The Malloc area is immediately below the monitor copy in RAM */
mem_malloc_init(CONFIG_SYS_MALLOC_BASE, CONFIG_SYS_MALLOC_LEN);
- malloc_bin_reloc();
WATCHDOG_RESET ();
bd->bi_flashsize = flash_init();
diff --git a/lib_sh/board.c b/lib_sh/board.c
index 5ed40e922b25d049c2c38b31d0fa2c47c0351989..c97e20c3e1cfc3f3a7cc2506835c59e3071c5562 100644
--- a/lib_sh/board.c
+++ b/lib_sh/board.c
@@ -32,7 +32,6 @@
#include <miiphy.h>
#endif
-extern void malloc_bin_reloc (void);
extern int cpu_init(void);
extern int board_init(void);
extern int dram_init(void);
@@ -92,7 +91,6 @@ static int sh_mem_env_init(void)
{
mem_malloc_init(TEXT_BASE - CONFIG_SYS_GBL_DATA_SIZE -
CONFIG_SYS_MALLOC_LEN, CONFIG_SYS_MALLOC_LEN - 16);
- malloc_bin_reloc();
env_relocate();
jumptable_init();
return 0;