diff --git a/arch/arm/cpu/arm926ejs/mx25/generic.c b/arch/arm/cpu/arm926ejs/mx25/generic.c
index 21fe44f187ac3e1d12b61f2e0d9463525d175d49..126164020fb17507cfe73c75f0e76d29aaba7525 100644
--- a/arch/arm/cpu/arm926ejs/mx25/generic.c
+++ b/arch/arm/cpu/arm926ejs/mx25/generic.c
@@ -105,6 +105,28 @@ ulong imx_get_perclk (int clk)
 	return lldiv (fref, div);
 }
 
+static char *get_reset_cause(void)
+{
+	/* read RCSR register from CCM module */
+	struct ccm_regs *ccm =
+		(struct ccm_regs *)IMX_CCM_BASE;
+
+	u32 cause = readl(&ccm->rcsr) & 0x0f;
+
+	if (cause == 0)
+		return "POR";
+	else if (cause == 1)
+		return "RST";
+	else if ((cause & 2) == 2)
+		return "WDOG";
+	else if ((cause & 4) == 4)
+		return "SW RESET";
+	else if ((cause & 8) == 8)
+		return "JTAG";
+	else
+		return "unknown reset";
+
+}
 
 u32 get_cpu_rev(void)
 {
@@ -136,10 +158,11 @@ int print_cpuinfo (void)
 	char buf[32];
 	u32 cpurev = get_cpu_rev();
 
-	printf("CPU:   Freescale i.MX25 rev%d.%d%s at %s MHz\n\n",
+	printf("CPU:   Freescale i.MX25 rev%d.%d%s at %s MHz\n",
 		(cpurev & 0xF0) >> 4, (cpurev & 0x0F),
 		((cpurev & 0x8000) ? " unknown" : ""),
 		strmhz (buf, imx_get_armclk ()));
+	printf("Reset cause: %s\n\n", get_reset_cause());
 	return 0;
 }
 #endif