diff --git a/board/atum8548/atum8548.c b/board/atum8548/atum8548.c
index 671f9e985364ef2084bd465d1998fef569755987..4fcbb18561b171e177f8000e1ff79705b1cc5197 100644
--- a/board/atum8548/atum8548.c
+++ b/board/atum8548/atum8548.c
@@ -218,14 +218,14 @@ void pci_init_board(void)
 
 		pcie1_hose.region_count = 1;
 #endif
-		printf ("    PCIE1 connected to Slot as %s (base addr %lx)\n",
+		printf ("PCIE1: connected to Slot as %s (base addr %lx)\n",
 				pcie_ep ? "Endpoint" : "Root Complex",
 				pci_info[num].regs);
 
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 					&pcie1_hose, first_free_busno);
 	} else {
-		printf ("    PCIE1: disabled\n");
+		printf("PCIE1: disabled\n");
 	}
 
 	puts("\n");
@@ -242,7 +242,7 @@ void pci_init_board(void)
 	if (!(devdisr & MPC85xx_DEVDISR_PCI1)) {
 		SET_STD_PCI_INFO(pci_info[num], 1);
 		pci_agent = fsl_setup_hose(&pci1_hose, pci_info[num].regs);
-		printf ("\n    PCI1: %d bit, %s MHz, %s, %s, %s (base address %lx)\n",
+		printf("PCI1: %d bit, %s MHz, %s, %s, %s (base address %lx)\n",
 			(pci_32) ? 32 : 64,
 			(pci_speed == 33333000) ? "33" :
 			(pci_speed == 66666000) ? "66" : "unknown",
@@ -254,7 +254,7 @@ void pci_init_board(void)
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 					&pci1_hose, first_free_busno);
 	} else {
-		printf ("    PCI: disabled\n");
+		printf("PCI1: disabled\n");
 	}
 
 	puts("\n");
@@ -267,11 +267,11 @@ void pci_init_board(void)
 		SET_STD_PCI_INFO(pci_info[num], 2);
 		pci_agent = fsl_setup_hose(&pci2_hose, pci_info[num].regs);
 
-		puts ("    PCI2\n");
+		puts("PCI2\n");
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 					&pci1_hose, first_free_busno);
 	} else {
-		printf ("    PCI2: disabled\n");
+		printf("PCI2: disabled\n");
 	}
 	puts("\n");
 #else
diff --git a/board/freescale/corenet_ds/pci.c b/board/freescale/corenet_ds/pci.c
index e1bca1984c2cbc536f1529bebaa802ebfc7242b5..775b623ccbb0d1f943f0d66951e3e798f12e2614 100644
--- a/board/freescale/corenet_ds/pci.c
+++ b/board/freescale/corenet_ds/pci.c
@@ -68,13 +68,13 @@ void pci_init_board(void)
 				LAW_TRGT_IF_PCIE_1);
 		SET_STD_PCIE_INFO(pci_info[num], 1);
 		pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
-		printf("    PCIE1 connected to Slot 1 as %s (base addr %lx)\n",
+		printf("PCIE1: connected to Slot 1 as %s (base addr %lx)\n",
 				pcie_ep ? "End Point" : "Root Complex",
 				pci_info[num].regs);
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 				&pcie1_hose, first_free_busno);
 	} else {
-		printf ("    PCIE1: disabled\n");
+		printf("PCIE1: disabled\n");
 	}
 #else
 	setbits_be32(&gur->devdisr, FSL_CORENET_DEVDISR_PCIE1); /* disable */
@@ -90,13 +90,13 @@ void pci_init_board(void)
 				LAW_TRGT_IF_PCIE_2);
 		SET_STD_PCIE_INFO(pci_info[num], 2);
 		pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs);
-		printf("    PCIE2 connected to Slot 3 as %s (base addr %lx)\n",
+		printf("PCIE2: connected to Slot 3 as %s (base addr %lx)\n",
 				pcie_ep ? "End Point" : "Root Complex",
 				pci_info[num].regs);
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 				&pcie2_hose, first_free_busno);
 	} else {
-		printf ("    PCIE2: disabled\n");
+		printf("PCIE2: disabled\n");
 	}
 #else
 	setbits_be32(&gur->devdisr, FSL_CORENET_DEVDISR_PCIE2); /* disable */
@@ -112,13 +112,13 @@ void pci_init_board(void)
 				LAW_TRGT_IF_PCIE_3);
 		SET_STD_PCIE_INFO(pci_info[num], 3);
 		pcie_ep = fsl_setup_hose(&pcie3_hose, pci_info[num].regs);
-		printf("    PCIE3 connected to Slot 2 as %s (base addr %lx)\n",
+		printf("PCIE3: connected to Slot 2 as %s (base addr %lx)\n",
 				pcie_ep ? "End Point" : "Root Complex",
 				pci_info[num].regs);
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 				&pcie3_hose, first_free_busno);
 	} else {
-		printf ("    PCIE3: disabled\n");
+		printf("PCIE3: disabled\n");
 	}
 #else
 	setbits_be32(&gur->devdisr, FSL_CORENET_DEVDISR_PCIE3); /* disable */
@@ -134,13 +134,13 @@ void pci_init_board(void)
 				LAW_TRGT_IF_PCIE_4);
 		SET_STD_PCIE_INFO(pci_info[num], 4);
 		pcie_ep = fsl_setup_hose(&pcie4_hose, pci_info[num].regs);
-		printf("    PCIE4 connected to as %s (base addr %lx)\n",
+		printf("PCIE4: connected to as %s (base addr %lx)\n",
 				pcie_ep ? "End Point" : "Root Complex",
 				pci_info[num].regs);
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 				&pcie4_hose, first_free_busno);
 	} else {
-		printf ("    PCIE4: disabled\n");
+		printf("PCIE4: disabled\n");
 	}
 #else
 	setbits_be32(&gur->devdisr, FSL_CORENET_DEVDISR_PCIE4); /* disable */
diff --git a/board/freescale/mpc8536ds/mpc8536ds.c b/board/freescale/mpc8536ds/mpc8536ds.c
index c8e08563b6a749e25c99bc79e337325f7dc27ac6..8ad75495172333fb97295ae19637f172189b2acc 100644
--- a/board/freescale/mpc8536ds/mpc8536ds.c
+++ b/board/freescale/mpc8536ds/mpc8536ds.c
@@ -229,13 +229,13 @@ void pci_init_board(void)
 				LAW_TRGT_IF_PCIE_3);
 		SET_STD_PCIE_INFO(pci_info[num], 3);
 		pcie_ep = fsl_setup_hose(&pcie3_hose, pci_info[num].regs);
-		printf ("    PCIE3 connected to Slot3 as %s (base address %lx)\n",
+		printf("PCIE3: connected to Slot3 as %s (base address %lx)\n",
 			pcie_ep ? "Endpoint" : "Root Complex",
 			pci_info[num].regs);
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 					&pcie3_hose, first_free_busno);
 	} else {
-		printf ("    PCIE3: disabled\n");
+		printf("PCIE3: disabled\n");
 	}
 
 	puts("\n");
@@ -253,13 +253,13 @@ void pci_init_board(void)
 				LAW_TRGT_IF_PCIE_1);
 		SET_STD_PCIE_INFO(pci_info[num], 1);
 		pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
-		printf ("    PCIE1 connected to Slot1 as %s (base address %lx)\n",
+		printf("PCIE1: connected to Slot1 as %s (base address %lx)\n",
 			pcie_ep ? "Endpoint" : "Root Complex",
 			pci_info[num].regs);
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 					&pcie1_hose, first_free_busno);
 	} else {
-		printf ("    PCIE1: disabled\n");
+		printf("PCIE1: disabled\n");
 	}
 
 	puts("\n");
@@ -277,13 +277,13 @@ void pci_init_board(void)
 				LAW_TRGT_IF_PCIE_2);
 		SET_STD_PCIE_INFO(pci_info[num], 2);
 		pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs);
-		printf ("    PCIE2 connected to Slot 2 as %s (base address %lx)\n",
+		printf("PCIE2: connected to Slot 2 as %s (base address %lx)\n",
 			pcie_ep ? "Endpoint" : "Root Complex",
 			pci_info[num].regs);
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 					&pcie2_hose, first_free_busno);
 	} else {
-		printf ("    PCIE2: disabled\n");
+		printf("PCIE2: disabled\n");
 	}
 
 	puts("\n");
@@ -304,7 +304,7 @@ void pci_init_board(void)
 				LAW_TRGT_IF_PCI);
 		SET_STD_PCI_INFO(pci_info[num], 1);
 		pci_agent = fsl_setup_hose(&pci1_hose, pci_info[num].regs);
-		printf ("\n    PCI: %d bit, %s MHz, %s, %s, %s (base address %lx)\n",
+		printf("PCI: %d bit, %s MHz, %s, %s, %s (base address %lx)\n",
 			(pci_32) ? 32 : 64,
 			(pci_speed == 33333000) ? "33" :
 			(pci_speed == 66666000) ? "66" : "unknown",
@@ -316,7 +316,7 @@ void pci_init_board(void)
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 					&pci1_hose, first_free_busno);
 	} else {
-		printf ("    PCI: disabled\n");
+		printf("PCI: disabled\n");
 	}
 
 	puts("\n");
diff --git a/board/freescale/mpc8540ads/mpc8540ads.c b/board/freescale/mpc8540ads/mpc8540ads.c
index f9ff827f47405bfb8e2db49fd814b758badc8974..d354a26f69a45f3fae22215df3ec12e3a5e535f9 100644
--- a/board/freescale/mpc8540ads/mpc8540ads.c
+++ b/board/freescale/mpc8540ads/mpc8540ads.c
@@ -47,10 +47,10 @@ int checkboard (void)
 	puts("Board: ADS\n");
 
 #ifdef CONFIG_PCI
-	printf("    PCI1: 32 bit, %d MHz (compiled)\n",
+	printf("PCI1: 32 bit, %d MHz (compiled)\n",
 	       CONFIG_SYS_CLK_FREQ / 1000000);
 #else
-	printf("    PCI1: disabled\n");
+	printf("PCI1: disabled\n");
 #endif
 
 	/*
diff --git a/board/freescale/mpc8541cds/mpc8541cds.c b/board/freescale/mpc8541cds/mpc8541cds.c
index 0580fe723959e50157214b84e4f15d55619f592c..59ec60446e91acda15112254ce866f6a83e37793 100644
--- a/board/freescale/mpc8541cds/mpc8541cds.c
+++ b/board/freescale/mpc8541cds/mpc8541cds.c
@@ -221,17 +221,17 @@ int checkboard (void)
 		MPC85XX_CPU_BOARD_MAJOR (cpu_board_rev),
 		MPC85XX_CPU_BOARD_MINOR (cpu_board_rev), cpu_board_rev);
 
-	printf ("    PCI1: %d bit, %s MHz, %s\n",
+	printf("PCI1: %d bit, %s MHz, %s\n",
 		(pci1_32) ? 32 : 64,
 		(pci1_speed == 33000000) ? "33" :
 		(pci1_speed == 66000000) ? "66" : "unknown",
 		pci1_clk_sel ? "sync" : "async");
 
 	if (pci_dual) {
-		printf ("    PCI2: 32 bit, 66 MHz, %s\n",
+		printf("PCI2: 32 bit, 66 MHz, %s\n",
 			pci2_clk_sel ? "sync" : "async");
 	} else {
-		printf ("    PCI2: disabled\n");
+		printf("PCI2: disabled\n");
 	}
 
 	/*
diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c
index da3a2b6eecda939b015cbe530650f829d405648f..3bbf0c273ab2b2156f4e7b6b5865bf89587c94c4 100644
--- a/board/freescale/mpc8544ds/mpc8544ds.c
+++ b/board/freescale/mpc8544ds/mpc8544ds.c
@@ -142,9 +142,9 @@ void pci_init_board(void)
 
 		pcie3_hose.region_count = 1;
 #endif
-		printf ("    PCIE3 connected to ULI as %s (base addr %lx)\n",
-				pcie_ep ? "Endpoint" : "Root Complex",
-				pci_info[num].regs);
+		printf("PCIE3: connected to ULI as %s (base addr %lx)\n",
+			pcie_ep ? "Endpoint" : "Root Complex",
+			pci_info[num].regs);
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 					&pcie3_hose, first_free_busno);
 
@@ -154,7 +154,7 @@ void pci_init_board(void)
 		 */
 		in_be32((u32 *)CONFIG_SYS_PCIE3_MEM_BUS);
 	} else {
-		printf ("    PCIE3: disabled\n");
+		printf("PCIE3: disabled\n");
 	}
 	puts("\n");
 #else
@@ -177,14 +177,14 @@ void pci_init_board(void)
 
 		pcie1_hose.region_count = 1;
 #endif
-		printf ("    PCIE1 connected to Slot 2 as %s (base addr %lx)\n",
+		printf("PCIE1: connected to Slot 2 as %s (base addr %lx)\n",
 				pcie_ep ? "Endpoint" : "Root Complex",
 				pci_info[num].regs);
 
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 					&pcie1_hose, first_free_busno);
 	} else {
-		printf ("    PCIE1: disabled\n");
+		printf("PCIE1: disabled\n");
 	}
 
 	puts("\n");
@@ -208,13 +208,13 @@ void pci_init_board(void)
 
 		pcie2_hose.region_count = 1;
 #endif
-		printf ("    PCIE2 connected to Slot 1 as %s (base addr %lx)\n",
-				pcie_ep ? "Endpoint" : "Root Complex",
-				pci_info[num].regs);
+		printf("PCIE2: connected to Slot 1 as %s (base addr %lx)\n",
+			pcie_ep ? "Endpoint" : "Root Complex",
+			pci_info[num].regs);
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 					&pcie2_hose, first_free_busno);
 	} else {
-		printf ("    PCIE2: disabled\n");
+		printf("PCIE2: disabled\n");
 	}
 
 	puts("\n");
@@ -231,7 +231,7 @@ void pci_init_board(void)
 	if (!(devdisr & MPC85xx_DEVDISR_PCI1)) {
 		SET_STD_PCI_INFO(pci_info[num], 1);
 		pci_agent = fsl_setup_hose(&pci1_hose, pci_info[num].regs);
-		printf ("\n    PCI: %d bit, %s MHz, %s, %s, %s (base address %lx)\n",
+		printf("PCI: %d bit, %s MHz, %s, %s, %s (base address %lx)\n",
 			(pci_32) ? 32 : 64,
 			(pci_speed == 33333000) ? "33" :
 			(pci_speed == 66666000) ? "66" : "unknown",
@@ -243,7 +243,7 @@ void pci_init_board(void)
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 					&pci1_hose, first_free_busno);
 	} else {
-		printf ("    PCI: disabled\n");
+		printf("PCI: disabled\n");
 	}
 
 	puts("\n");
diff --git a/board/freescale/mpc8548cds/mpc8548cds.c b/board/freescale/mpc8548cds/mpc8548cds.c
index 23e552bde7732e58d70f0bc1cc5a61d8a0630840..14c902cb9604071e4e87ad30d179afed96b89d00 100644
--- a/board/freescale/mpc8548cds/mpc8548cds.c
+++ b/board/freescale/mpc8548cds/mpc8548cds.c
@@ -284,7 +284,7 @@ void pci_init_board(void)
 	if (!(devdisr & MPC85xx_DEVDISR_PCI1)) {
 		SET_STD_PCI_INFO(pci_info[num], 1);
 		pci_agent = fsl_setup_hose(&pci1_hose, pci_info[num].regs);
-		printf ("\n    PCI: %d bit, %s MHz, %s, %s, %s (base address %lx)\n",
+		printf("PCI: %d bit, %s MHz, %s, %s, %s (base address %lx)\n",
 			(pci_32) ? 32 : 64,
 			(pci_speed == 33333000) ? "33" :
 			(pci_speed == 66666000) ? "66" : "unknown",
@@ -308,7 +308,7 @@ void pci_init_board(void)
 		}
 #endif
 	} else {
-		printf ("    PCI: disabled\n");
+		printf("PCI: disabled\n");
 	}
 
 	puts("\n");
@@ -321,10 +321,10 @@ void pci_init_board(void)
 	uint pci2_clk_sel = porpllsr & 0x4000;	/* PORPLLSR[17] */
 	uint pci_dual = get_pci_dual ();	/* PCI DUAL in CM_PCI[3] */
 	if (pci_dual) {
-		printf ("    PCI2: 32 bit, 66 MHz, %s\n",
+		printf("PCI2: 32 bit, 66 MHz, %s\n",
 			pci2_clk_sel ? "sync" : "async");
 	} else {
-		printf ("    PCI2: disabled\n");
+		printf("PCI2: disabled\n");
 	}
 }
 #else
@@ -337,14 +337,14 @@ void pci_init_board(void)
 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
 		SET_STD_PCIE_INFO(pci_info[num], 1);
 		pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
-		printf ("    PCIE1 connected to Slot as %s (base addr %lx)\n",
-				pcie_ep ? "Endpoint" : "Root Complex",
-				pci_info[num].regs);
+		printf("PCIE1: connected to Slot as %s (base addr %lx)\n",
+			pcie_ep ? "Endpoint" : "Root Complex",
+			pci_info[num].regs);
 
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 					&pcie1_hose, first_free_busno);
 	} else {
-		printf ("    PCIE1: disabled\n");
+		printf("PCIE1: disabled\n");
 	}
 
 	puts("\n");
diff --git a/board/freescale/mpc8555cds/mpc8555cds.c b/board/freescale/mpc8555cds/mpc8555cds.c
index b7e0e0cd82bad2b5ac08137b116b1353c726b14f..edaba26f5335fdb26d504d1be79fec5844d155eb 100644
--- a/board/freescale/mpc8555cds/mpc8555cds.c
+++ b/board/freescale/mpc8555cds/mpc8555cds.c
@@ -219,17 +219,17 @@ int checkboard (void)
 		MPC85XX_CPU_BOARD_MAJOR (cpu_board_rev),
 		MPC85XX_CPU_BOARD_MINOR (cpu_board_rev), cpu_board_rev);
 
-	printf ("    PCI1: %d bit, %s MHz, %s\n",
+	printf("PCI1: %d bit, %s MHz, %s\n",
 		(pci1_32) ? 32 : 64,
 		(pci1_speed == 33000000) ? "33" :
 		(pci1_speed == 66000000) ? "66" : "unknown",
 		pci1_clk_sel ? "sync" : "async");
 
 	if (pci_dual) {
-		printf ("    PCI2: 32 bit, 66 MHz, %s\n",
+		printf("PCI2: 32 bit, 66 MHz, %s\n",
 			pci2_clk_sel ? "sync" : "async");
 	} else {
-		printf ("    PCI2: disabled\n");
+		printf("PCI2: disabled\n");
 	}
 
 	/*
diff --git a/board/freescale/mpc8560ads/mpc8560ads.c b/board/freescale/mpc8560ads/mpc8560ads.c
index 423e9d72a761b56b8b024c1190fc832a411a354f..1761431e33898e8c548944c404e61f0429359b53 100644
--- a/board/freescale/mpc8560ads/mpc8560ads.c
+++ b/board/freescale/mpc8560ads/mpc8560ads.c
@@ -252,10 +252,10 @@ int checkboard (void)
 	puts("Board: ADS\n");
 
 #ifdef CONFIG_PCI
-	printf("    PCI1: 32 bit, %d MHz (compiled)\n",
+	printf("PCI1: 32 bit, %d MHz (compiled)\n",
 	       CONFIG_SYS_CLK_FREQ / 1000000);
 #else
-	printf("    PCI1: disabled\n");
+	printf("PCI1: disabled\n");
 #endif
 
 	/*
diff --git a/board/freescale/mpc8568mds/mpc8568mds.c b/board/freescale/mpc8568mds/mpc8568mds.c
index bd859e4ee4bcbf2ae32ff9290e445ca59a1ac6bf..d74fcac98355f7445a9faaaec5337ddc1b4f3c1f 100644
--- a/board/freescale/mpc8568mds/mpc8568mds.c
+++ b/board/freescale/mpc8568mds/mpc8568mds.c
@@ -378,7 +378,7 @@ void pci_init_board(void)
 	if (!(devdisr & MPC85xx_DEVDISR_PCI1)) {
 		SET_STD_PCI_INFO(pci_info[num], 1);
 		pci_agent = fsl_setup_hose(&pci1_hose, pci_info[num].regs);
-		printf ("\n    PCI: %d bit, %s MHz, %s, %s, %s (base address %lx)\n",
+		printf("PCI: %d bit, %s MHz, %s, %s, %s (base address %lx)\n",
 			(pci_32) ? 32 : 64,
 			(pci_speed == 33333000) ? "33" :
 			(pci_speed == 66666000) ? "66" : "unknown",
@@ -390,7 +390,7 @@ void pci_init_board(void)
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 					&pci1_hose, first_free_busno);
 	} else {
-		printf ("    PCI: disabled\n");
+		printf("PCI: disabled\n");
 	}
 
 	puts("\n");
@@ -404,14 +404,14 @@ void pci_init_board(void)
 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
 		SET_STD_PCIE_INFO(pci_info[num], 1);
 		pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
-		printf ("    PCIE1 connected to Slot as %s (base addr %lx)\n",
+		printf("PCIE1: connected to Slot as %s (base addr %lx)\n",
 				pcie_ep ? "Endpoint" : "Root Complex",
 				pci_info[num].regs);
 
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 					&pcie1_hose, first_free_busno);
 	} else {
-		printf ("    PCIE1: disabled\n");
+		printf("PCIE1: disabled\n");
 	}
 
 	puts("\n");
diff --git a/board/freescale/mpc8569mds/mpc8569mds.c b/board/freescale/mpc8569mds/mpc8569mds.c
index 743e712b849a8a4b2f39a3d2eef1a7a532203d00..dc0884e7bf19a4c2ab91ac8a2da046e9d6fde7e6 100644
--- a/board/freescale/mpc8569mds/mpc8569mds.c
+++ b/board/freescale/mpc8569mds/mpc8569mds.c
@@ -584,13 +584,13 @@ void pci_init_board(void)
 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
 		SET_STD_PCIE_INFO(pci_info[num], 1);
 		pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
-		printf ("    PCIE1 connected to Slot as %s (base addr %lx)\n",
-				pcie_ep ? "Endpoint" : "Root Complex",
-				pci_info[num].regs);
+		printf("PCIE1: connected to Slot as %s (base addr %lx)\n",
+			pcie_ep ? "Endpoint" : "Root Complex",
+			pci_info[num].regs);
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 					&pcie1_hose, first_free_busno);
 	} else {
-		printf ("    PCIE1: disabled\n");
+		printf("PCIE1: disabled\n");
 	}
 
 	puts("\n");
diff --git a/board/freescale/mpc8572ds/mpc8572ds.c b/board/freescale/mpc8572ds/mpc8572ds.c
index 6b96dfc16581ba48870a6c0e7c84055ac22f65ac..21252742154748bb2974d0179caf4757c06b5f7d 100644
--- a/board/freescale/mpc8572ds/mpc8572ds.c
+++ b/board/freescale/mpc8572ds/mpc8572ds.c
@@ -192,9 +192,9 @@ void pci_init_board(void)
 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE3)){
 		SET_STD_PCIE_INFO(pci_info[num], 3);
 		pcie_ep = fsl_setup_hose(&pcie3_hose, pci_info[num].regs);
-		printf ("    PCIE3 connected to ULI as %s (base addr %lx)\n",
-				pcie_ep ? "Endpoint" : "Root Complex",
-				pci_info[num].regs);
+		printf("PCIE3: connected to ULI as %s (base addr %lx)\n",
+			pcie_ep ? "Endpoint" : "Root Complex",
+			pci_info[num].regs);
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 					&pcie3_hose, first_free_busno);
 		/*
@@ -211,7 +211,7 @@ void pci_init_board(void)
 			in_be32(p);
 		}
 	} else {
-		printf ("    PCIE3: disabled\n");
+		printf("PCIE3: disabled\n");
 	}
 	puts("\n");
 #else
@@ -224,13 +224,13 @@ void pci_init_board(void)
 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE2)){
 		SET_STD_PCIE_INFO(pci_info[num], 2);
 		pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs);
-		printf ("    PCIE2 connected to Slot 1 as %s (base addr %lx)\n",
-				pcie_ep ? "Endpoint" : "Root Complex",
-				pci_info[num].regs);
+		printf("PCIE2: connected to Slot 1 as %s (base addr %lx)\n",
+			pcie_ep ? "Endpoint" : "Root Complex",
+			pci_info[num].regs);
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 					&pcie2_hose, first_free_busno);
 	} else {
-		printf ("    PCIE2: disabled\n");
+		printf("PCIE2: disabled\n");
 	}
 
 	puts("\n");
@@ -244,13 +244,13 @@ void pci_init_board(void)
 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
 		SET_STD_PCIE_INFO(pci_info[num], 1);
 		pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
-		printf ("    PCIE1 connected to Slot 2 as %s (base addr %lx)\n",
+		printf("PCIE1: connected to Slot 2 as %s (base addr %lx)\n",
 				pcie_ep ? "Endpoint" : "Root Complex",
 				pci_info[num].regs);
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 					&pcie1_hose, first_free_busno);
 	} else {
-		printf ("    PCIE1: disabled\n");
+		printf("PCIE1: disabled\n");
 	}
 
 	puts("\n");
diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c
index f67f3e3c56c8dc174917f2975c97bea67e9f3c21..61a635de78d25cfb1759686f9bd5c467a4e22528 100644
--- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c
+++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c
@@ -244,14 +244,14 @@ void pci_init_board(void)
 	if (pcie_configured && !(devdisr & MPC86xx_DEVDISR_PCIE1)){
 		SET_STD_PCIE_INFO(pci_info[num], 1);
 		pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
-		printf ("    PCIE1 connected to ULI as %s (base addr %lx)\n",
-				pcie_ep ? "Endpoint" : "Root Complex",
-				pci_info[num].regs);
+		printf("PCIE1: connected to ULI as %s (base addr %lx)\n",
+			pcie_ep ? "Endpoint" : "Root Complex",
+			pci_info[num].regs);
 
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 					&pcie1_hose, first_free_busno);
 	} else {
-		printf ("    PCIE1: disabled\n");
+		printf("PCIE1: disabled\n");
 	}
 
 	puts("\n");
@@ -265,13 +265,13 @@ void pci_init_board(void)
 	if (pcie_configured && !(devdisr & MPC86xx_DEVDISR_PCIE2)){
 		SET_STD_PCIE_INFO(pci_info[num], 2);
 		pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs);
-		printf ("    PCIE2 connected to Slot as %s (base addr %lx)\n",
-				pcie_ep ? "Endpoint" : "Root Complex",
-				pci_info[num].regs);
+		printf("PCIE2: connected to Slot as %s (base addr %lx)\n",
+			pcie_ep ? "Endpoint" : "Root Complex",
+			pci_info[num].regs);
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 					&pcie2_hose, first_free_busno);
 	} else {
-		printf ("    PCIE2: disabled\n");
+		printf("PCIE2: disabled\n");
 	}
 
 	puts("\n");
@@ -283,14 +283,14 @@ void pci_init_board(void)
 	if (!(devdisr & MPC86xx_DEVDISR_PCI1)) {
 		SET_STD_PCI_INFO(pci_info[num], 1);
 		pci_agent = fsl_setup_hose(&pci1_hose, pci_info[num].regs);
-		printf(" PCI connected to PCI slots as %s" \
+		printf("PCI: connected to PCI slots as %s" \
 			" (base address %lx)\n",
 			pci_agent ? "Agent" : "Host",
 			pci_info[num].regs);
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 					&pci1_hose, first_free_busno);
 	} else {
-		printf ("    PCI: disabled\n");
+		printf("PCI: disabled\n");
 	}
 
 	puts("\n");
diff --git a/board/freescale/mpc8641hpcn/mpc8641hpcn.c b/board/freescale/mpc8641hpcn/mpc8641hpcn.c
index 092ead6653572023fef815a35b0c0946c1aed6c8..812111db10070b47098e7364fb446848d568b9ef 100644
--- a/board/freescale/mpc8641hpcn/mpc8641hpcn.c
+++ b/board/freescale/mpc8641hpcn/mpc8641hpcn.c
@@ -157,9 +157,9 @@ void pci_init_board(void)
 	if (pcie_configured && !(devdisr & MPC86xx_DEVDISR_PCIEX1)) {
 		SET_STD_PCIE_INFO(pci_info[num], 1);
 		pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
-		printf("    PCIE1 connected to ULI as %s (base addr %lx)\n",
-				pcie_ep ? "Endpoint" : "Root Complex",
-				pci_info[num].regs);
+		printf("PCIE1: connected to ULI as %s (base addr %lx)\n",
+			pcie_ep ? "Endpoint" : "Root Complex",
+			pci_info[num].regs);
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 					&pcie1_hose, first_free_busno);
 
@@ -171,22 +171,22 @@ void pci_init_board(void)
 				       + CONFIG_SYS_PCIE1_MEM_SIZE - 0x1000000)));
 
 	} else {
-		puts("    PCIE1: disabled\n");
+		puts("PCIE1: disabled\n");
 	}
 #else
-	puts("    PCIE1: disabled\n");
+	puts("PCIE1: disabled\n");
 #endif /* CONFIG_PCIE1 */
 
 #ifdef CONFIG_PCIE2
 	SET_STD_PCIE_INFO(pci_info[num], 2);
 	pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs);
-	printf("    PCIE2 connected as %s (base addr %lx)\n",
-			pcie_ep ? "Endpoint" : "Root Complex",
-			pci_info[num].regs);
+	printf("PCIE2: connected as %s (base addr %lx)\n",
+		pcie_ep ? "Endpoint" : "Root Complex",
+		pci_info[num].regs);
 	first_free_busno = fsl_pci_init_port(&pci_info[num++],
 				&pcie2_hose, first_free_busno);
 #else
-	puts("    PCIE2: disabled\n");
+	puts("PCIE2: disabled\n");
 #endif /* CONFIG_PCIE2 */
 
 }
diff --git a/board/freescale/p1022ds/p1022ds.c b/board/freescale/p1022ds/p1022ds.c
index ee93e8b8156f930352253a59b88b75164c9dace2..7cb549b1bfb6a5932bb473b955f5b0749ae311c1 100644
--- a/board/freescale/p1022ds/p1022ds.c
+++ b/board/freescale/p1022ds/p1022ds.c
@@ -225,7 +225,7 @@ static void configure_pcie(struct fsl_pci_info *info,
 	set_next_law(info->mem_phys, law_size_bits(info->mem_size), info->law);
 	set_next_law(info->io_phys, law_size_bits(info->io_size), info->law);
 	is_endpoint = fsl_setup_hose(hose, info->regs);
-	printf("    PCIE%u connected to %s as %s (base addr %lx)\n",
+	printf("PCIE%u: connected to %s as %s (base addr %lx)\n",
 	       info->pci_num, connected,
 	       is_endpoint ? "Endpoint" : "Root Complex", info->regs);
 	bus_number = fsl_pci_init_port(info, hose, bus_number);
@@ -255,7 +255,7 @@ void pci_init_board(void)
 		SET_STD_PCIE_INFO(pci_info, 1);
 		configure_pcie(&pci_info, &pcie1_hose, serdes_slot_name(PCIE1));
 	} else {
-		printf("    PCIE1: disabled\n");
+		printf("PCIE1: disabled\n");
 	}
 #else
 	setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCIE); /* disable */
@@ -266,7 +266,7 @@ void pci_init_board(void)
 		SET_STD_PCIE_INFO(pci_info, 2);
 		configure_pcie(&pci_info, &pcie2_hose, serdes_slot_name(PCIE2));
 	} else {
-		printf("    PCIE2: disabled\n");
+		printf("PCIE2: disabled\n");
 	}
 #else
 	setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCIE2); /* disable */
@@ -277,7 +277,7 @@ void pci_init_board(void)
 		SET_STD_PCIE_INFO(pci_info, 3);
 		configure_pcie(&pci_info, &pcie3_hose, serdes_slot_name(PCIE3));
 	} else {
-		printf("    PCIE3: disabled\n");
+		printf("PCIE3: disabled\n");
 	}
 #else
 	setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCIE3); /* disable */
diff --git a/board/freescale/p1_p2_rdb/pci.c b/board/freescale/p1_p2_rdb/pci.c
index 97d4f834b08ed700de6c6418a6066fbce43b2b33..e2ed29c3c40c95d511282b8eec1800cca603c6ed 100644
--- a/board/freescale/p1_p2_rdb/pci.c
+++ b/board/freescale/p1_p2_rdb/pci.c
@@ -65,13 +65,13 @@ void pci_init_board(void)
 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
 		SET_STD_PCIE_INFO(pci_info[num], 2);
 		pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs);
-		printf("    PCIE2 connected to Slot 1 as %s (base addr %lx)\n",
-				pcie_ep ? "Endpoint" : "Root Complex",
-				pci_info[num].regs);
+		printf("PCIE2: connected to Slot 1 as %s (base addr %lx)\n",
+			pcie_ep ? "Endpoint" : "Root Complex",
+			pci_info[num].regs);
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 					&pcie2_hose, first_free_busno);
 	} else {
-		printf ("    PCIE2: disabled\n");
+		printf("PCIE2: disabled\n");
 	}
 	puts("\n");
 #else
@@ -84,13 +84,13 @@ void pci_init_board(void)
 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
 		SET_STD_PCIE_INFO(pci_info[num], 1);
 		pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
-		printf("    PCIE1 connected to Slot 2 as %s (base addr %lx)\n",
-				pcie_ep ? "Endpoint" : "Root Complex",
-				pci_info[num].regs);
+		printf("PCIE1: connected to Slot 2 as %s (base addr %lx)\n",
+			pcie_ep ? "Endpoint" : "Root Complex",
+			pci_info[num].regs);
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 					&pcie1_hose, first_free_busno);
 	} else {
-		printf ("    PCIE1: disabled\n");
+		printf("PCIE1: disabled\n");
 	}
 	puts("\n");
 #else
diff --git a/board/freescale/p2020ds/p2020ds.c b/board/freescale/p2020ds/p2020ds.c
index 608ff916da819f78236bed570c8572ba30bfd525..f9882722c91767879a2be22e424cdbeff53fea97 100644
--- a/board/freescale/p2020ds/p2020ds.c
+++ b/board/freescale/p2020ds/p2020ds.c
@@ -218,9 +218,9 @@ void pci_init_board(void)
 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE2)) {
 		SET_STD_PCIE_INFO(pci_info[num], 2);
 		pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs);
-		printf("    PCIE2 connected to ULI as %s (base addr %lx)\n",
-				pcie_ep ? "Endpoint" : "Root Complex",
-				pci_info[num].regs);
+		printf("PCIE2: connected to ULI as %s (base addr %lx)\n",
+			pcie_ep ? "Endpoint" : "Root Complex",
+			pci_info[num].regs);
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 					&pcie2_hose, first_free_busno);
 
@@ -245,7 +245,7 @@ void pci_init_board(void)
 		}
 #endif
 	} else {
-		printf("    PCIE2: disabled\n");
+		printf("PCIE2: disabled\n");
 	}
 	puts("\n");
 #else
@@ -258,13 +258,13 @@ void pci_init_board(void)
 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE3)) {
 		SET_STD_PCIE_INFO(pci_info[num], 3);
 		pcie_ep = fsl_setup_hose(&pcie3_hose, pci_info[num].regs);
-		printf("    PCIE3 connected to Slot 1 as %s (base addr %lx)\n",
-				pcie_ep ? "Endpoint" : "Root Complex",
-				pci_info[num].regs);
+		printf("PCIE3: connected to Slot 1 as %s (base addr %lx)\n",
+			pcie_ep ? "Endpoint" : "Root Complex",
+			pci_info[num].regs);
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 					&pcie3_hose, first_free_busno);
 	} else {
-		printf("    PCIE3: disabled\n");
+		printf("PCIE3: disabled\n");
 	}
 	puts("\n");
 #else
@@ -277,13 +277,13 @@ void pci_init_board(void)
 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)) {
 		SET_STD_PCIE_INFO(pci_info[num], 1);
 		pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
-		printf("    PCIE1 connected to Slot 2 as %s (base addr %lx)\n",
-				pcie_ep ? "Endpoint" : "Root Complex",
-				pci_info[num].regs);
+		printf("PCIE1: connected to Slot 2 as %s (base addr %lx)\n",
+			pcie_ep ? "Endpoint" : "Root Complex",
+			pci_info[num].regs);
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 					&pcie1_hose, first_free_busno);
 	} else {
-		printf("    PCIE1: disabled\n");
+		printf("PCIE1: disabled\n");
 	}
 	puts("\n");
 #else
diff --git a/board/pm854/pm854.c b/board/pm854/pm854.c
index a302b917677518bb50932cfa4ba348fe26af4539..0b8ea8192c9711bfe5aa517af4894a5be95f79a2 100644
--- a/board/pm854/pm854.c
+++ b/board/pm854/pm854.c
@@ -59,10 +59,10 @@ int checkboard (void)
 	puts("Board: MicroSys PM854\n");
 
 #ifdef CONFIG_PCI
-	printf("    PCI1: 32 bit, %d MHz (compiled)\n",
+	printf("PCI1: 32 bit, %d MHz (compiled)\n",
 	       CONFIG_SYS_CLK_FREQ / 1000000);
 #else
-	printf("    PCI1: disabled\n");
+	printf("PCI1: disabled\n");
 #endif
 
 	/*
diff --git a/board/pm856/pm856.c b/board/pm856/pm856.c
index f9d92d99846ddb1688e93745ff5d599bbceb5a36..4e059b08594fd038b545f184ac134af378110cc0 100644
--- a/board/pm856/pm856.c
+++ b/board/pm856/pm856.c
@@ -213,10 +213,10 @@ int checkboard (void)
 	puts("Board: MicroSys PM856\n");
 
 #ifdef CONFIG_PCI
-	printf("    PCI1: 32 bit, %d MHz (compiled)\n",
+	printf("PCI1: 32 bit, %d MHz (compiled)\n",
 	       CONFIG_SYS_CLK_FREQ / 1000000);
 #else
-	printf("    PCI1: disabled\n");
+	printf("PCI1: disabled\n");
 #endif
 
 	/*
diff --git a/board/sbc8548/sbc8548.c b/board/sbc8548/sbc8548.c
index 733979c6190e01d47cafadffeea064b062d0ffb7..272428fbf8027f1bbe7cda993a9cc04be02d328f 100644
--- a/board/sbc8548/sbc8548.c
+++ b/board/sbc8548/sbc8548.c
@@ -342,7 +342,7 @@ pci_init_board(void)
 		uint pci_clk_sel = porpllsr & MPC85xx_PORDEVSR_PCI1_SPD;
 		uint pci_speed = CONFIG_SYS_CLK_FREQ;	/* get_clock_freq() */
 
-		printf ("    PCI host: %d bit, %s MHz, %s, %s\n",
+		printf("PCI: Host, %d bit, %s MHz, %s, %s\n",
 			(pci_32) ? 32 : 64,
 			(pci_speed == 33000000) ? "33" :
 			(pci_speed == 66000000) ? "66" : "unknown",
@@ -353,7 +353,7 @@ pci_init_board(void)
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 					&pci1_hose, first_free_busno);
 	} else {
-		printf ("    PCI: disabled\n");
+		printf("PCI: disabled\n");
 	}
 
 	puts("\n");
@@ -368,11 +368,11 @@ pci_init_board(void)
 
 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
 		SET_STD_PCIE_INFO(pci_info[num], 1);
-		printf ("    PCIE at base address %lx\n", pci_info[num].regs);
+		printf("PCIE: base address %lx\n", pci_info[num].regs);
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 					&pcie1_hose, first_free_busno);
 	} else {
-		printf ("    PCIE: disabled\n");
+		printf("PCIE: disabled\n");
 	}
 
 	puts("\n");
diff --git a/board/sbc8641d/sbc8641d.c b/board/sbc8641d/sbc8641d.c
index d954d2f6f74899c191f209248164e0887009aa9f..5bf2364ee2d7e00a70824eb204ced9585d9a3612 100644
--- a/board/sbc8641d/sbc8641d.c
+++ b/board/sbc8641d/sbc8641d.c
@@ -221,29 +221,29 @@ void pci_init_board(void)
 	if (pcie_configured && !(devdisr & MPC86xx_DEVDISR_PCIEX1)) {
 		SET_STD_PCIE_INFO(pci_info[num], 1);
 		pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
-		printf("    PCIE1 connected as %s (base addr %lx)\n",
-				pcie_ep ? "Endpoint" : "Root Complex",
-				pci_info[num].regs);
+		printf("PCIE1: connected as %s (base addr %lx)\n",
+			pcie_ep ? "Endpoint" : "Root Complex",
+			pci_info[num].regs);
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 					&pcie1_hose, first_free_busno);
 	} else {
-		puts("    PCIE1: disabled\n");
+		puts("PCIE1: disabled\n");
 	}
 #else
-	puts("    PCIE1: disabled\n");
+	puts("PCIE1: disabled\n");
 #endif /* CONFIG_PCIE1 */
 
 #ifdef CONFIG_PCIE2
 
 	SET_STD_PCIE_INFO(pci_info[num], 2);
 	pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs);
-	printf("    PCIE2 connected as %s (base addr %lx)\n",
-			pcie_ep ? "Endpoint" : "Root Complex",
-			pci_info[num].regs);
+	printf("PCIE2: connected as %s (base addr %lx)\n",
+		pcie_ep ? "Endpoint" : "Root Complex",
+		pci_info[num].regs);
 	first_free_busno = fsl_pci_init_port(&pci_info[num++],
 				&pcie2_hose, first_free_busno);
 #else
-	puts("    PCIE2: disabled\n");
+	puts("PCIE2: disabled\n");
 #endif /* CONFIG_PCIE2 */
 }
 
diff --git a/board/tqc/tqm85xx/tqm85xx.c b/board/tqc/tqm85xx/tqm85xx.c
index b21e7914c34d0a3bb244cfe4f2844ac702c2be95..527af6dd2ee84a39dc4bbb2453b1d6f87f029f17 100644
--- a/board/tqc/tqm85xx/tqm85xx.c
+++ b/board/tqc/tqm85xx/tqm85xx.c
@@ -567,7 +567,7 @@ void pci_init_board (void)
 	if (!(devdisr & MPC85xx_DEVDISR_PCI1)) {
 		SET_STD_PCI_INFO(pci_info[num], 1);
 		pcie_ep = fsl_setup_hose(&pci1_hose, pci_info[num].regs);
-		printf ("\n   PCI1:  %d bit, %s MHz, %s, %s, %s\n",
+		printf("PCI1:  %d bit, %s MHz, %s, %s, %s\n",
 			(pci_32) ? 32 : 64,
 			(pci_speed == 33333333) ? "33" :
 			(pci_speed == 66666666) ? "66" : "unknown",
@@ -591,7 +591,7 @@ void pci_init_board (void)
 		}
 #endif
 	} else {
-		printf("    PCI1: disabled\n");
+		printf("PCI1: disabled\n");
 	}
 #else
 	setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1);
@@ -603,12 +603,12 @@ void pci_init_board (void)
 	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)) {
 		SET_STD_PCIE_INFO(pci_info[num], 1);
 		pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
-		printf("    PCIE1 connected as %s\n",
+		printf("PCIE1: connected as %s\n",
 			pcie_ep ? "Endpoint" : "Root Complex");
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 					&pcie1_hose, first_free_busno);
 	} else {
-		printf("    PCIE1: disabled\n");
+		printf("PCIE1: disabled\n");
 	}
 #else
 	setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCIE);
diff --git a/board/xes/common/fsl_8xxx_pci.c b/board/xes/common/fsl_8xxx_pci.c
index f425ceedc45664f90b48e13b3f84b3adb12f6429..4a0965bf08dfcaee9c8c24918c6eb52fc9dfa9e9 100644
--- a/board/xes/common/fsl_8xxx_pci.c
+++ b/board/xes/common/fsl_8xxx_pci.c
@@ -95,7 +95,7 @@ void pci_init_board(void)
 	if (!(devdisr & MPC85xx_DEVDISR_PCI1)) {
 		SET_STD_PCI_INFO(pci_info[num], 1);
 		pcie_ep = fsl_setup_hose(&pci1_hose, pci_info[num].regs);
-		printf("\n    PCI1: %d bit %s, %s %d MHz, %s, %s\n",
+		printf("PCI1: %d bit %s, %s %d MHz, %s, %s\n",
 			pci_32 ? 32 : 64,
 			pcix ? "PCIX" : "PCI",
 			pci_spd_norm ? ">=" : "<=",
@@ -106,7 +106,7 @@ void pci_init_board(void)
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 					&pci1_hose, first_free_busno);
 	} else {
-		printf("    PCI1: disabled\n");
+		printf("PCI1: disabled\n");
 	}
 #elif defined CONFIG_MPC8548
 	/* PCI1 not present on MPC8572 */
@@ -119,12 +119,12 @@ void pci_init_board(void)
 	if (pcie_configured && !(devdisr & MPC8xxx_DEVDISR_PCIE1)) {
 		SET_STD_PCIE_INFO(pci_info[num], 1);
 		pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
-		printf("    PCIE1 connected as %s\n",
+		printf("PCIE1: connected as %s\n",
 			pcie_ep ? "Endpoint" : "Root Complex");
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 					&pcie1_hose, first_free_busno);
 	} else {
-		printf("    PCIE1: disabled\n");
+		printf("PCIE1: disabled\n");
 	}
 #else
 	setbits_be32(&gur->devdisr, MPC8xxx_DEVDISR_PCIE1);
@@ -136,12 +136,12 @@ void pci_init_board(void)
 	if (pcie_configured && !(devdisr & MPC8xxx_DEVDISR_PCIE2)) {
 		SET_STD_PCIE_INFO(pci_info[num], 2);
 		pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs);
-		printf("    PCIE2 connected as %s\n",
+		printf("PCIE2: connected as %s\n",
 			pcie_ep ? "Endpoint" : "Root Complex");
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 					&pcie2_hose, first_free_busno);
 	} else {
-		printf("    PCIE2: disabled\n");
+		printf("PCIE2: disabled\n");
 	}
 #else
 	setbits_be32(&gur->devdisr, MPC8xxx_DEVDISR_PCIE2);
@@ -153,12 +153,12 @@ void pci_init_board(void)
 	if (pcie_configured && !(devdisr & MPC8xxx_DEVDISR_PCIE3)) {
 		SET_STD_PCIE_INFO(pci_info[num], 3);
 		pcie_ep = fsl_setup_hose(&pcie3_hose, pci_info[num].regs);
-		printf("    PCIE3 connected as %s\n",
+		printf("PCIE3: connected as %s\n",
 			pcie_ep ? "Endpoint" : "Root Complex");
 		first_free_busno = fsl_pci_init_port(&pci_info[num++],
 					&pcie3_hose, first_free_busno);
 	} else {
-		printf("    PCIE3: disabled\n");
+		printf("PCIE3: disabled\n");
 	}
 #else
 	setbits_be32(&gur->devdisr, MPC8xxx_DEVDISR_PCIE3);
diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c
index 45794dabed3924eaa252a6feb66b4944b89817ec..21cbb3baaabd43b24209689949d222ff9fac6965 100644
--- a/drivers/pci/fsl_pci_init.c
+++ b/drivers/pci/fsl_pci_init.c
@@ -391,11 +391,11 @@ void fsl_pci_init(struct pci_controller *hose, u32 cfg_addr, u32 cfg_data)
 	 * 1 == pci agent or pcie end-point
 	 */
 	if (!temp8) {
-		printf("               Scanning PCI bus %02x\n",
+		printf("           Scanning PCI bus %02x\n",
 			hose->current_busno);
 		hose->last_busno = pci_hose_scan_bus(hose, hose->current_busno);
 	} else {
-		debug("               Not scanning PCI bus %02x. PI=%x\n",
+		debug("           Not scanning PCI bus %02x. PI=%x\n",
 			hose->current_busno, temp8);
 		hose->last_busno = hose->current_busno;
 	}
@@ -482,9 +482,9 @@ int fsl_pci_init_port(struct fsl_pci_info *pci_info,
 	}
 
 	pci_hose_read_config_byte(hose, dev, FSL_PCIE_CAP_ID, &pcie_cap);
-	printf("    PCI%s%x on bus %02x - %02x\n", pcie_cap == PCI_CAP_ID_EXP ?
-			"E" : "", pci_info->pci_num,
-			hose->first_busno, hose->last_busno);
+	printf("PCI%s%x: Bus %02x - %02x\n", pcie_cap == PCI_CAP_ID_EXP ?
+		"E" : "", pci_info->pci_num,
+		hose->first_busno, hose->last_busno);
 
 	return(hose->last_busno + 1);
 }