diff --git a/cpu/mpc85xx/Makefile b/cpu/mpc85xx/Makefile
index 88093029650f048458a2d396905c3d1400d8a00d..1477eace97d30177faddc483d671d7ce2525791f 100644
--- a/cpu/mpc85xx/Makefile
+++ b/cpu/mpc85xx/Makefile
@@ -48,8 +48,9 @@ COBJS-$(CONFIG_MPC8544) += ddr-gen2.o
 # supports ddr1/2/3
 COBJS-$(CONFIG_MPC8572) += ddr-gen3.o
 COBJS-$(CONFIG_MPC8536) += ddr-gen3.o
-COBJS-$(CONFIG_P2020)	+= ddr-gen3.o
 COBJS-$(CONFIG_MPC8569)	+= ddr-gen3.o
+COBJS-$(CONFIG_P2020)	+= ddr-gen3.o
+COBJS-$(CONFIG_P1020)	+= ddr-gen3.o
 
 COBJS-$(CONFIG_MPC8536) += mpc8536_serdes.o
 COBJS	= traps.o cpu.o cpu_init.o speed.o interrupts.o tlb.o \
diff --git a/cpu/mpc8xxx/cpu.c b/cpu/mpc8xxx/cpu.c
index 17aed62b16fef9b3bff9d1b962c6a3abae20da30..fbab9980eec03735462c6ea51f9395e7ac64b920 100644
--- a/cpu/mpc8xxx/cpu.c
+++ b/cpu/mpc8xxx/cpu.c
@@ -66,6 +66,8 @@ struct cpu_type cpu_type_list [] = {
 	CPU_TYPE_ENTRY(8572, 8572_E, 2),
 	CPU_TYPE_ENTRY(P2020, P2020, 2),
 	CPU_TYPE_ENTRY(P2020, P2020_E, 2),
+	CPU_TYPE_ENTRY(P1020, P1020, 2),
+	CPU_TYPE_ENTRY(P1020, P1020_E, 2),
 #elif defined(CONFIG_MPC86xx)
 	CPU_TYPE_ENTRY(8610, 8610, 1),
 	CPU_TYPE_ENTRY(8641, 8641, 2),
diff --git a/drivers/misc/fsl_law.c b/drivers/misc/fsl_law.c
index f7d454dce457d75e4677fd0710c6b064cbabd44f..af7b72993499f468e9a6e33387764fa19dfef4c8 100644
--- a/drivers/misc/fsl_law.c
+++ b/drivers/misc/fsl_law.c
@@ -39,7 +39,7 @@ DECLARE_GLOBAL_DATA_PTR;
       defined(CONFIG_MPC8641) || defined(CONFIG_MPC8610)
 #define FSL_HW_NUM_LAWS 10
 #elif defined(CONFIG_MPC8536) || defined(CONFIG_MPC8572) || \
-      defined(CONFIG_P2020)
+      defined(CONFIG_P2020) || defined(CONFIG_P1020)
 #define FSL_HW_NUM_LAWS 12
 #else
 #error FSL_HW_NUM_LAWS not defined for this platform
diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h
index a079b2d4cb5bc48b72584345a78e2b66d41970a2..5547245d5e7ba76398de6e4cd90602d37d1304b9 100644
--- a/include/asm-ppc/processor.h
+++ b/include/asm-ppc/processor.h
@@ -1011,6 +1011,8 @@
 #define SVR_8572_E	0x80E800
 #define SVR_P2020	0x80E200
 #define SVR_P2020_E	0x80EA00
+#define SVR_P1020	0x80E400
+#define SVR_P1020_E	0x80EC00
 
 #define SVR_8610	0x80A000
 #define SVR_8641	0x809000