From 334e442e6fac59be91244063e9b3f6ca25e8daf8 Mon Sep 17 00:00:00 2001
From: Grzegorz Bernacki <gjb@semihalf.com>
Date: Wed, 16 Jan 2008 15:12:47 +0100
Subject: [PATCH] Set ips dividor to 1/4 of csb clock.

Previous setting cause ips clock to be out of spec. This bug was found by John
Rigby from Freescale.

Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
---
 include/mpc512x.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/mpc512x.h b/include/mpc512x.h
index a06b5c6502..d1c6fb29f6 100644
--- a/include/mpc512x.h
+++ b/include/mpc512x.h
@@ -185,7 +185,7 @@
 
 /* SCFR1 System Clock Frequency Register 1
  */
-#define SCFR1_IPS_DIV			0x2
+#define SCFR1_IPS_DIV			0x4
 #define SCFR1_IPS_DIV_MASK		0x03800000
 #define SCFR1_IPS_DIV_SHIFT		23
 
-- 
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