diff --git a/recipes-bsp/u-boot/files/0012-Fix_multiple_definition_warning.patch b/recipes-bsp/u-boot/files/0012-Fix_multiple_definition_warning.patch
new file mode 100644
index 0000000000000000000000000000000000000000..fffc6366ba9b91620c43a32b212ccda484bd572b
--- /dev/null
+++ b/recipes-bsp/u-boot/files/0012-Fix_multiple_definition_warning.patch
@@ -0,0 +1,14 @@
+diff --git a/include/configs/vesta.h b/include/configs/vesta.h
+index 9be4905..66fce27 100644
+--- a/include/configs/vesta.h
++++ b/include/configs/vesta.h
+@@ -17,6 +17,9 @@
+ /* uncomment for PLUGIN mode support */
+  #define CONFIG_USE_PLUGIN
+ 
++#ifdef CONFIG_BOOTDELAY
++#undef CONFIG_BOOTDELAY
++#endif
+ #define CONFIG_BOOTDELAY        0
+ #define CONFIG_RESET_TO_RETRY
+ #define CONFIG_BOOT_RETRY_TIME  5
diff --git a/recipes-bsp/u-boot/u-boot-vesta_2016.03.bb b/recipes-bsp/u-boot/u-boot-vesta_2016.03.bb
index d1dc2e186b0693af9334a8a33ab02dc5f03604c3..adc8a6d82f2b2427dcacd98287bcf71192955420 100644
--- a/recipes-bsp/u-boot/u-boot-vesta_2016.03.bb
+++ b/recipes-bsp/u-boot/u-boot-vesta_2016.03.bb
@@ -34,6 +34,7 @@ SRC_URI += "file://0008-Added-support-for-SPI-flash-chips-MACRONIX-SPANSION.patc
 SRC_URI += "file://0009-Added-defconfig-for-boards-with-qspi-flash.patch"
 SRC_URI += "file://0010-BugFix-Added-board-id-of-300B.patch"
 SRC_URI += "file://0011-Enable_retry_Disable_bootdelay.patch"
+SRC_URI += "file://0012-Fix_multiple_definition_warning.patch"
 SRC_URI += "file://qspi-header"
 
 S = "${WORKDIR}/git"
diff --git a/recipes-kernel/linux/linux-fslc-imx/device-tree/vesta-300B.dts b/recipes-kernel/linux/linux-fslc-imx/device-tree/vesta-300B.dts
index 61cd1ad0a83a62b99f13ece6942296d26680090c..eb41cc836425571486adf5613afb83928d81f0c8 100644
--- a/recipes-kernel/linux/linux-fslc-imx/device-tree/vesta-300B.dts
+++ b/recipes-kernel/linux/linux-fslc-imx/device-tree/vesta-300B.dts
@@ -136,6 +136,13 @@
 	};
 };
 
+&i2c4 {
+	clock-frequency = <100000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c4>;
+	status = "okay";
+};
+
 &adc1 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_adc1>;
@@ -213,22 +220,22 @@
 
 		pinctrl_i2c1: i2c1grp {
 			fsl,pins = <
-				MX6UL_PAD_CSI_PIXCLK__I2C1_SCL	0x00001820
-				MX6UL_PAD_GPIO1_IO03__I2C1_SDA	0x00001820
+				MX6UL_PAD_CSI_PIXCLK__I2C1_SCL	0x40001820
+				MX6UL_PAD_GPIO1_IO03__I2C1_SDA	0x40001820
 			>;
 		};
 
 		pinctrl_i2c2: i2c2grp {
 			fsl,pins = <
-				MX6UL_PAD_CSI_HSYNC__I2C2_SCL	0x00001820
-				MX6UL_PAD_CSI_VSYNC__I2C2_SDA	0x00001820
+				MX6UL_PAD_CSI_HSYNC__I2C2_SCL	0x40001820
+				MX6UL_PAD_CSI_VSYNC__I2C2_SDA	0x40001820
 			>;
 		};
 
 		pinctrl_i2c4: i2c4grp {
 			fsl,pins = <
-				MX6UL_PAD_LCD_DATA03__I2C4_SCL	0x00001820
-				MX6UL_PAD_LCD_DATA02__I2C4_SDA	0x00001820
+				MX6UL_PAD_LCD_DATA03__I2C4_SCL	0x40001820
+				MX6UL_PAD_LCD_DATA02__I2C4_SDA	0x40001820
 			>;
 		};